JP3077255B2 - Wiring board and its manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board in which wiring layers formed on both sides of a wiring board are connected via conductive layers provided in through holes of the wiring board, and a method of manufacturing the same. The present invention relates to a wiring board in which the line width dimensional accuracy of a wiring layer is improved and a circuit short circuit is unlikely to occur, and an improvement in a manufacturing method thereof.

[0002]

2. Description of the Related Art A multi-layer wiring board in which a plurality of inner-layer circuit boards are laminated via an adhesive insulating layer as an example of this type of wiring board will be described. The plating method is used.

The outline of the method will be described below. As shown in FIG. 19, a plurality of inner layer circuit boards a having a copper wiring layer are formed on an outer layer on which a copper film j such as a copper foil having a thickness of about 35 μm is uniformly formed. 26 and an integrated insulating layer (prepreg) b together with the substrate a1 (see FIG. 26), and through holes c as shown in FIGS.
After drilling, an electroless plating treatment with copper is performed to cover the inner wall surface of the through hole c with a copper film, and a copper plating layer d having a thickness of about 30 μm as shown in FIGS. Is formed on the copper film j and the inner wall surface of the through hole c of the outer layer substrate a1.

Next, a photoresist layer e is formed in a pattern on the surface of the copper plating layer d except for a part around the through hole c and a wiring layer forming portion of the outer layer substrate a1 (see FIGS. 22 and 29). ), A solder plating layer f is formed on a portion exposed from the photoresist layer e (see FIGS. 23 and 30), and the photoresist layer e is removed (see FIG. 31). Using copper as a mask, the copper plating layer d and the copper film j exposed from the mask are sequentially removed by etching as shown in FIGS. 24 and 32 to form a conductive layer k and a copper wiring layer m. A multilayered wiring board h as shown in FIG. 25 is obtained by forming a solder resist layer g on the surface.

However, when the conductive layer k and the copper wiring layer m are formed by the "panel plating method", as shown in FIG. 33, the copper plating sandwiched between the outer layer substrate a1 and the solder plating layer f is performed. Since the exposed dimension of the layer d and the copper coating j in the thickness direction is large (in this example, the thickness is 65 μm), when the copper plating layer d and the copper coating j having a thickness of 65 μm are etched, the copper plating layer d and the copper coating j are formed. The coating j is susceptible to side etching and the line width dimensional accuracy is deteriorated. In addition, since the protruding portion of the solder plating layer f (this portion is called overhang) is large, this portion is easily cut during the process. There was a disadvantage of causing a short circuit.

Accordingly, a forming method called "pattern plating" has been developed in which the etching dimension in the thickness direction is smaller than that of "panel plating".

That is, in this forming method, after the through hole c is formed, a thin (about 10 μm) thin film copper plating layer d1 is formed by electroless plating as shown in FIG. The film j and the inner wall surface of the through hole c are formed respectively.

Next, a photoresist layer e is formed in a pattern on the surface of the thin-film copper plating layer d1 as shown in FIG. 35 except for a part around the through hole c and a wiring layer forming portion of the outer layer substrate a1. In addition, a thick copper plating layer d2 having a thickness of about 20 μm is formed on a portion exposed from the photoresist layer e by a plating method (see FIG. 36), and a solder plating layer is formed on the thick copper plating layer d2. f (FIG. 3)
7).

Next, as shown in FIG. 38, the photoresist layer e is removed, and the thin copper plating layer d1 exposed from the mask and the copper film j are exposed using the solder plating layer f as a mask.
Are sequentially removed by etching as shown in FIG. 39 to form a conductive layer k and a copper wiring layer m.

In this "pattern plating method", the film to be etched when forming the conductive layer k and the copper wiring layer m is a thin film copper plating layer d1 having a thickness of 10 .mu.m as shown in FIG. A 35 μm copper film j is formed, and the etching dimension in the thickness direction is 45 μm, which is smaller than the etching dimension of “panel plating method” of 65 μm. It is said that there is an advantage that the circuit short-circuit is reduced.

[0011]

However, in this "pattern plating method", too, the thick copper plating layer d2, the thin copper plating layer d1, and the copper coating j sandwiched between the outer layer substrate a1 and the solder plating layer f. Since the exposure dimension in the thickness direction is as large as 65 μm as in the “panel plating method”, there is a disadvantage that side etching easily occurs even when the etching dimension is reduced by about 20 μm, and as shown in FIG. However, there was a problem that the overhang was insufficient and the overhang was large.

SUMMARY OF THE INVENTION The present invention has been made in view of such problems, and it is an object of the present invention to provide a wiring board in which the line width dimension accuracy of a wiring layer is improved and a circuit short circuit is unlikely to occur, and a method of manufacturing the same. To provide.

[0013]

That is, according to the first aspect of the present invention, a copper wiring layer formed on both sides of a wiring board is formed through through holes provided in the wiring board, and the inner wall surface and the periphery thereof are provided. Assuming that the wiring board is connected by a conductive layer formed at the site, a conductive intermediate layer provided on the inner wall surface of the copper wiring layer and the through hole and having resistance to a copper etching agent, and the intermediate layer The conductive layer is composed of a copper layer provided thereon and a solder layer provided on the copper layer. Assuming that the formed copper wiring layer is connected to a wiring board connected to the inner wall surface and a conductive layer formed on the peripheral portion thereof through the through hole provided in the wiring board, the copper wiring layer and the through hole are provided. On the wall A conductive intermediate layer having provided resistance to the etchant of the copper, a copper layer provided on the intermediate layer, the city in which characterized in that said conductive layer is formed.

According to a third aspect of the present invention, a copper wiring layer formed on both sides of the wiring board is formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. Assuming a wiring board connected by layers, the copper wiring layer and a thin-film copper layer provided on the inner wall surface of the through-hole, and a conductive film having a resistance to a copper etching agent provided on the thin-film copper layer 5. The conductive layer comprises an intermediate layer, a thick copper layer provided on the intermediate layer, and a solder layer provided on the thick copper layer. According to the invention, there is provided a wiring board in which copper wiring layers respectively formed on both sides of a wiring board are connected by conductive layers formed on inner wall surfaces and peripheral portions thereof through through holes provided in the wiring board. With the above copper distribution Layer and a thin-film copper layer provided on the inner wall surface of the through-hole, a conductive intermediate layer provided on the thin-film copper layer and having resistance to a copper etching agent, and a thick film provided on the intermediate layer The conductive layer is composed of a copper layer and a copper layer.

In such technical means, in the invention according to claims 1 and 3, the wiring board obtained since the outermost layer is a solder layer is referred to as a "solder through hole" type. In the invention according to No. 4, the wiring board obtained because the outermost layer is a copper layer is referred to as a “copper through hole” type.

The wiring board may be a multilayer wiring board in which a plurality of circuit boards for an inner layer are laminated via an insulating adhesive layer as exemplified in the prior art, or may be a single-layer wiring board. This may be configured as follows.

Materials for forming a conductive intermediate layer having resistance to a copper etching agent include, for example, gold,
Nickel, rhodium, tin, etc. are targeted.

The invention according to claim 5 relates to a wiring board in which the wiring board is specified, wherein the wiring board is a multilayer wiring board in which a plurality of inner circuit boards are laminated via an insulating adhesive layer. The invention according to claim 6 relates to a wiring board in which the intermediate layer is specified, wherein the intermediate layer includes:
It is characterized by being composed of gold, nickel, rhodium or tin.

On the other hand, according to the present invention, the copper wiring layers formed on both sides of the wiring board are formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. Assuming a method of manufacturing a wiring board connected by layers, a through-hole forming step of drilling a through-hole in a wiring board in which a copper film is uniformly laminated on both sides thereof, and a peripheral portion of the through-hole. A resist layer forming step of forming a resist layer in a pattern on the copper film except for a portion where a wiring layer is formed, and the copper film surface exposed from the resist layer and the inner wall surface of the through hole have resistance to a copper etchant. An intermediate layer forming step of depositing a conductive intermediate layer by electroless plating, a copper layer forming step of selectively depositing a copper layer on the intermediate layer by plating, and A solder layer forming step of selectively depositing a solder layer, and after removing the resist layer, etching the copper film exposed from the solder layer using the solder layer as a mask to form the wiring layer and the conductive layer. The invention according to claim 8 is characterized in that a copper wiring layer formed on each of both sides of the wiring board has an inner wall surface and a through-hole provided in the wiring board. Assuming a method of manufacturing a wiring board connected by a conductive layer formed at the peripheral portion, a through-hole forming step of drilling a through-hole in a wiring board in which a copper film is uniformly laminated on both sides thereof; A resist layer forming step of forming a resist layer in a pattern on the copper film except for a peripheral portion of the through hole and a formation portion of the wiring layer, and a copper film exposed from the resist layer An intermediate layer forming step of depositing a conductive intermediate layer having a resistance to a copper etching agent on the inner wall surface of the through hole by an electroless plating method, and selectively depositing a copper layer on the intermediate layer by a plating method. A copper layer forming step of forming a film, a mask layer forming step of selectively forming a mask layer made of solder or a photosensitive resin on the copper layer, and after removing the resist layer, forming a copper film exposed from the mask layer. It is characterized by comprising an etching step of forming the wiring layer and the conductive layer by etching, and a peeling step of peeling and removing the mask layer to expose the copper layer.

According to a ninth aspect of the present invention, the copper wiring layers formed on both sides of the wiring board are formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. Assuming a method of manufacturing a wiring board connected by layers, a through-hole forming step of forming a through-hole in a wiring board in which a copper coating is uniformly laminated on both sides thereof, and the copper coating on both sides of the wiring board A thin-film copper layer forming a thin-film copper layer on the surface and the inner wall surface of the through-hole by electroless plating, and onto the thin-film copper layer except for the peripheral portion of the through-hole and the formation portion of the wiring layer. A resist layer forming step of forming a resist layer in a pattern, and selectively depositing a conductive intermediate layer having resistance to a copper etching agent on a thin copper layer exposed from the resist layer by a plating method; An intermediate layer forming step, a thick copper layer forming step of selectively depositing a thick copper layer having a large film thickness on the intermediate layer by a plating method, and selectively forming a solder layer on the thick copper layer. Forming a wiring layer and a conductive layer by sequentially etching the thin copper layer and the copper film exposed from the solder layer using the solder layer as a mask after removing the resist layer, and forming the wiring layer and the conductive layer. The invention according to claim 10 is characterized in that a copper wiring layer formed on each of both sides of the wiring board has an inner wall surface and a through-hole provided in the wiring board. Assuming a method of manufacturing a wiring board connected by a conductive layer formed at the peripheral portion, a through-hole forming step of drilling a through-hole in a wiring board in which a copper film is uniformly laminated on both sides thereof; , Both sides of the wiring board A thin-film copper layer forming step of depositing a thin-film copper layer having a small thickness on the copper film surface and the inner wall surface of the through-hole by an electroless plating method, and excluding a peripheral portion of the through-hole and a portion where a wiring layer is formed; A resist layer forming step of forming a resist layer on the layer in a pattern, and selectively depositing a conductive intermediate layer having resistance to a copper etching agent on the thin copper layer exposed from the resist layer by a plating method. An intermediate layer forming step of forming a film, a thick copper layer forming step of selectively depositing a thick copper layer having a large film thickness on the intermediate layer by a plating method, and soldering or photosensitivity on the thick copper layer. A mask layer forming step of selectively forming a mask layer made of a resin, and after removing the resist layer,
An etching step of sequentially etching the thin film copper layer and the copper film exposed from the mask layer to form the wiring layer and the conductive layer, and a peeling step of peeling and removing the mask layer to expose the thick copper layer, And characterized in that:

The invention according to claim 11 relates to a method for manufacturing a wiring board in which the wiring board is specified, similarly to the invention according to claim 5, wherein the wiring board is provided with a plurality of inner layer circuits via an insulating adhesive layer. The invention according to claim 12 relates to a method for manufacturing a wiring board in which the intermediate layer is specified as in the invention according to claim 6, wherein the multilayer wiring board is formed by laminating boards. The layer is made of gold, nickel, rhodium, or tin.

In the inventions according to the ninth and tenth aspects, the intermediate layer can be formed on the copper film surface and the thin film copper layer formed on the inner wall surface of the through hole, so that normal electrolytic plating can be performed. However, in the invention according to claims 7 and 8, since the intermediate layer is directly deposited on the copper coating surface and the inner wall surface of the through hole, it is necessary to perform this by electroless plating.

[0023]

According to the first and second aspects of the present invention, a conductive intermediate layer having resistance to a copper etchant is interposed between the copper layer and a copper wiring layer constituting a part of the conductive layer. According to the third and fourth aspects of the present invention, copper is etched between the thick copper layer constituting a part of the conductive layer and the thin copper layer deposited on the copper wiring layer. Since a conductive intermediate layer having resistance to the agent is interposed, when the conductive layer and the copper wiring layer are formed by etching, the copper layer or the thick copper layer of the conductive layer is soldered. While the exposure dimension in the thickness direction is reduced by being sandwiched between the mask layer such as a layer and the intermediate layer, the copper coating constituting the copper wiring layer is also exposed in the thickness direction by being sandwiched by the intermediate layer and the wiring board. The size is reduced, and the penetration of the etching agent into this portion is less likely to occur.

Therefore, side etching of the copper layer, the thick copper layer and the copper film hardly occurs, so that the line width dimensional accuracy of the copper wiring layer and the like is improved, and the overhang of the solder or the like constituting the mask layer is formed. Can also prevent a circuit short circuit caused by a cut overhang, and furthermore, after forming the conductive layer and the copper wiring layer, the conductive layer comes into contact with an appropriate treating agent that dissolves copper in the course of manufacturing the wiring board. In this case, the conductive layer and the copper wiring layer are not disconnected due to the presence of the intermediate layer.

On the other hand, according to the invention according to claims 7 and 8,
A conductive intermediate layer having resistance to a copper etching agent is formed between the copper film laminated on the wiring board and the copper layer formed in the copper layer forming step, and further comprising:
According to the invention according to the above, a copper etching agent between the thin copper layer deposited on the copper film in the thin copper layer forming step and the thick copper layer deposited in the thick copper layer forming step Since the conductive intermediate layer that is resistant to the resistance is formed in the intermediate layer forming step, the wiring layer and the conductive layer are formed by etching the copper film exposed from the solder layer or the mask layer in the etching step. When, or when forming a wiring layer and a conductive layer by sequentially etching the thin film copper layer and the copper film exposed from the solder layer or the mask layer in the etching step, the copper layer constituting the conductive layer or While the thick copper layer is sandwiched between the solder layer or the mask layer and the intermediate layer, the exposed dimension in the thickness direction is reduced, and the copper film constituting the copper wiring layer is also sandwiched between the intermediate layer and the wiring board. The exposed dimension in the thickness direction is reduced hardly occur penetration of the etchant for this site.

Therefore, side etching of the copper layer, the thick copper layer and the copper film hardly occurs, so that the line width dimensional accuracy of the copper wiring layer and the like can be improved, and the solder forming the solder layer or the mask layer can be improved. Since the above-mentioned overhang is also reduced, it is possible to prevent a short circuit caused by the broken overhang.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings.

Embodiment 1 A wiring board according to this embodiment is one in which a glass-epoxy copper-clad laminate in which copper foil is adhered on both front and back surfaces is applied as the wiring board.

That is, as shown in FIG. 1, the wiring board according to this embodiment is formed by laminating a plurality of inner-layer circuit boards and an outer-layer board (both not shown) via an adhesive insulating layer. A substrate 1, a through hole 2 formed in the wiring substrate 1, a copper wiring layer 3 having a thickness of 35 μm formed on the wiring substrate 1, a copper wiring layer 3, and a through hole 2.
10 μm-thick thin-film copper plating layer 4 provided on the inner wall surface
And a thickness of 2 to 3 μm provided on the thin copper plating layer 4.
m, a nickel intermediate layer 5, a thick copper plating layer 6 having a thickness of 20 μm provided on the intermediate layer 5, and a solder layer 7 provided on the thick copper plating layer 6. Is constituted.

The wiring board is manufactured through the following steps.

First, as shown in FIG.
After forming the wiring board 1 by laminating the outer layer substrate and the inner layer circuit board on which the 5 μm copper foil 30 is laminated via an adhesive insulating layer, as shown in FIG. Hole 2 was drilled.

Next, a thin film copper plating film 40 having a thickness of 10 μm is formed on the copper foil 30 and the inner wall surface of the through hole 2 by electroless plating under the same conditions as the above-mentioned “panel plating method” as shown in FIG. After a film is formed and a resist layer 8 is formed in a pattern except for a peripheral portion of the through hole 2 and a portion where the wiring layer is formed on the thin copper plating film 40 as shown in FIG. Thin copper plating film 40
2.5 A / d using a plating solution (50 ° C.) having the following composition
Under the condition of m ² , a nickel intermediate layer 5 having a thickness of 2 to 3 μm was formed as shown in FIG.

(Composition of plating solution) Nickel sulfamate 350 g / L Nickel chloride 5 g / L Boric acid 40 g / L Stress regulator 0.5-3 mL / L Pit inhibitor 2-3 mL / L Next, the intermediate layer 5 20μ thick by plating method
Then, a thick copper plating layer 6 is formed (see FIG. 8), and a solder layer 7 is deposited on the thick copper plating layer 6 as shown in FIG.

Then, as shown in FIG. 10, after removing the resist layer 8 from the thin copper plating film 40, the resist layer 8 is etched with a copper etching agent applied in the above-mentioned "panel plating method" to form the solder layer. The thin copper plating film 40 having a thickness of 10 μm and the copper foil 30 having a thickness of 35 μm which are exposed from 7 are sequentially etched to form a thin copper plating layer 4 and a wiring layer 3 made of copper foil. The conductive layer 9 composed of the layer 4, the intermediate layer 5, the thick copper plating layer 6, and the solder layer 7 was formed to obtain the wiring board as shown in FIG.

In the manufacturing method according to this embodiment, in the etching step, the thin copper plating film 40 and the copper foil 30 exposed from the solder layer 7 are etched to form the copper foil wiring layer 3 and the conductive layer 9. At this time, the thick copper plating layer 6 constituting a part of the conductive layer 9 is sandwiched between the solder layer 7 and the intermediate layer 5 and has an exposed dimension in the thickness direction of 20 μm.
m and the copper foil 3 forming the copper foil wiring layer 3
The thickness 0 is also sandwiched between the intermediate layer 5 and the wiring board 1 and the exposed dimension in the thickness direction is 10 μm.
Is reduced to 45 μm.

Accordingly, as shown in FIG. 2, side etching of the thick copper plating layer 6 and the copper foil 30 is less likely to occur, so that the line width dimensional accuracy of the copper foil wiring layer 3 and the like can be improved, and the solder layer 7 can be formed. Has the advantage that a short circuit due to a broken overhang can be prevented beforehand.

After the wiring layer 3 made of copper foil and the conductive layer 9 are formed, even if the conductive layer 9 comes into contact with an appropriate treating agent for dissolving copper during the production of the wiring board, the presence of the intermediate layer 5 also There is an advantage that the conductive layer 9 and the copper foil wiring layer 3 are not disconnected.

As a modification, a plating solution (6
0 ° C.) and a similar nickel intermediate layer was formed under the conditions of 2.5 A / dm ² , but the same effect was obtained.

(Composition of plating solution) Nickel sulfamate 300 g / L Nickel chloride 45 g / L Boric acid 45 g / L Stress regulator 0.5-3 ml / L Pit inhibitor 2-3 mL / L [Example 2] The wiring board according to the example also employs a glass-epoxy copper-clad laminate in which copper foils are bonded on both front and back surfaces as the wiring board.

That is, as shown in FIG. 11, the wiring board according to this embodiment is formed by laminating a plurality of inner-layer circuit boards and outer-layer boards (both not shown) via an adhesive insulating layer. A substrate 1, a through hole 2 formed in the wiring substrate 1, and a 35 μm-thickness formed on the wiring substrate 1.
Copper wiring layer 3, a gold intermediate layer 5 having a thickness of 2 to 3 μm provided on the copper foil wiring layer 3 and the inner wall surface of the through hole 2, and a thickness provided on the intermediate layer 5. The main part is composed of a copper plating layer 60 having a thickness of 30 μm and the solder layer 7 provided on the copper plating layer 60.

This wiring board is manufactured through the following steps.

First, as shown in FIG. 13, a wiring board 1 was formed by laminating an outer layer substrate and an inner layer circuit board having a 35 μm thick copper foil 30 laminated on the surface thereof through an adhesive insulating layer. A through-hole 2 having a diameter of 0.35 mm was formed by a rear drill.

Next, as shown in FIG. 14, the resist layer 8 is formed in a pattern except for the peripheral portion of the through hole 2 and the portion where the wiring layer is formed on the copper foil 30, and then the copper exposed from the resist layer 8 is formed. As shown in FIG. 15, a thickness of 2 to 3 μm was formed on the foil 30 by an electroless plating method using a plating solution having the following composition.
m of gold intermediate layer 5 was formed.

(Composition of Plating Solution) Ion-exchanged water 500 ml Potassium gold cyanide 4.4 g GOBEL-2M 500 ml (trade name, manufactured by Uemura Kogyo Co., Ltd.) 30μ
Then, a copper plating layer 60 is formed (see FIG. 16), and a solder layer 7 is formed on the copper plating layer 60 as shown in FIG.

Next, as shown in FIG. 18, after removing the resist layer 8 from the copper foil 30, the resist layer 8 is etched with a copper etchant applied in the above-mentioned "panel plating method" to remove the resist layer 8 from the solder layer 7. Exposed thickness 35μm
Is etched to form a copper foil wiring layer 3,
In addition, a conductive layer 9 including the intermediate layer 5, the copper plating layer 60 and the solder layer 7 was formed to obtain the wiring board as shown in FIG.

In the manufacturing method according to this embodiment, when the copper foil 30 exposed from the solder layer 7 is etched in the etching step to form the copper foil wiring layer 3 and the conductive layer 9, the conductive layer 9, the copper plating layer 60 is sandwiched between the solder layer 7 and the intermediate layer 5 and the exposed dimension in the thickness direction is reduced to 30 μm, while the copper foil forming the copper foil wiring layer 3 is reduced. 30 is also sandwiched between the intermediate layer 5 and the wiring board 1 and its exposed dimension in the thickness direction is reduced to 35 μm.

Therefore, as shown in FIG.
0 and side etching of the copper foil 30 are less likely to occur, so that the line width dimensional accuracy of the copper foil wiring layer 3 and the like can be improved, and the overhang of the solder layer 7 can be reduced, thereby preventing a circuit short circuit. This has the advantage that it becomes possible.

After the wiring layer 3 made of copper foil and the conductive layer 9 are formed, even if the conductive layer 9 comes into contact with an appropriate treating agent for dissolving copper during the production of the wiring board, the presence of the intermediate layer 5 also There is an advantage that the conductive layer 9 and the copper foil wiring layer 3 are not disconnected.

[0049]

According to the first to sixth aspects of the present invention, when the conductive layer and the copper wiring layer are formed by the etching process, the copper layer, the thick copper layer and the side of the copper film constituting these layers are formed. Since the etch hardly occurs, the line width dimensional accuracy of the copper wiring layer and the like is improved, which has the effect of increasing the wiring density, and the overhang of the solder etc. constituting the mask layer during the etching process is also small. Therefore, it is possible to prevent a circuit short-circuit caused by this overhang, and after forming the conductive layer and the copper wiring layer, the conductive layer is appropriately treated with a processing agent that dissolves copper in the course of manufacturing the wiring board. Even when touched, the presence of the intermediate layer has the effect that the conductive layer and the copper wiring layer are not disconnected.

On the other hand, according to the invention according to claims 7 to 12, when the copper film exposed from the solder layer or the mask layer is etched in the etching step to form the wiring layer and the conductive layer, or In the etching step, when the thin film copper layer and the copper film exposed from the solder layer or the mask layer are sequentially etched to form the wiring layer and the conductive layer, the copper layer or the thick copper layer constituting the conductive layer is soldered. While the exposed dimension in the thickness direction is reduced by being sandwiched between the layer or the mask layer and the intermediate layer, the exposed dimension in the thickness direction of the copper film constituting the copper wiring layer is also reduced by being sandwiched between the intermediate layer and the wiring board. Become.

Accordingly, since the side etching of the copper layer, the thick copper layer and the copper film hardly occurs, the line width dimensional accuracy of the copper wiring layer and the like is improved, and the copper wiring layer having a high wiring density can be easily and reliably formed. In addition, the overhang of the solder constituting the solder layer or the mask layer is reduced, and the short circuit due to the overhang can be prevented.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a wiring board according to a first embodiment.

FIG. 2 is a partially enlarged view of FIG.

FIG. 3 is a manufacturing process diagram of the first embodiment.

FIG. 4 is a manufacturing process diagram of the first embodiment.

FIG. 5 is a manufacturing process diagram of the first embodiment.

FIG. 6 is a manufacturing process diagram of the first embodiment.

FIG. 7 is a manufacturing process diagram of the first embodiment.

FIG. 8 is a manufacturing process diagram of the first embodiment.

FIG. 9 is a manufacturing process diagram of the first embodiment.

FIG. 10 is a manufacturing process diagram of the first embodiment.

FIG. 11 is a partial cross-sectional view of a wiring board according to a second embodiment.

FIG. 12 is a partially enlarged view of FIG. 11;

FIG. 13 is a manufacturing process diagram of the second embodiment.

FIG. 14 is a manufacturing process diagram of the second embodiment.

FIG. 15 is a manufacturing process diagram of the second embodiment.

FIG. 16 is a manufacturing process diagram of the second embodiment.

FIG. 17 is a manufacturing process diagram of the second embodiment.

FIG. 18 is a manufacturing process diagram of the second embodiment.

FIG. 19 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 20 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 21 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 22 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 23 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 24 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 25 is a perspective view showing a process of manufacturing a wiring board by a conventional “panel plating method”.

FIG. 26 is a sectional view of FIG. 19;

FIG. 27 is a sectional view of FIG. 20;

FIG. 28 is a sectional view of FIG. 21;

FIG. 29 is a partial sectional view of FIG. 22;

FIG. 30 is a partial sectional view of FIG. 23;

FIG. 31 is a sectional view showing a conventional manufacturing process.

FIG. 32 is a partial sectional view of FIG. 24;

FIG. 33 is a partially enlarged view of FIG. 32;

FIG. 34 is a manufacturing process diagram of a conventional “pattern plating method”.

FIG. 35 is a manufacturing process diagram of a conventional “pattern plating method”.

FIG. 36 is a manufacturing process diagram of a conventional “pattern plating method”.

FIG. 37 is a manufacturing process diagram of a conventional “pattern plating method”.

FIG. 38 is a manufacturing process diagram of a conventional “pattern plating method”.

FIG. 39 is a manufacturing process diagram of a conventional “pattern plating method”.

40 is a partially enlarged view of FIG. 39.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Wiring board 2 Through hole 3 Copper foil wiring layer 4 Thin copper plating layer 5 Intermediate layer 6 Thick copper plating layer 7 Solder layer 9 Conductive layer 60 Copper plating layer

Claims (12)

(57) [Claims] A wiring board in which copper wiring layers formed on both sides of a wiring board are connected by conductive layers formed on inner wall surfaces and peripheral portions thereof through through holes provided in the wiring board. In the above, the copper wiring layer and a conductive intermediate layer provided on the inner wall surface of the through hole and having resistance to a copper etchant, a copper layer provided on the intermediate layer, and provided on the copper layer A wiring layer, wherein the conductive layer comprises: a solder layer; 2. A wiring board in which copper wiring layers formed on both sides of a wiring board are connected by conductive layers formed on inner wall surfaces and peripheral portions thereof through through holes provided in the wiring board. In the above, the conductive layer is composed of the copper wiring layer and a conductive intermediate layer provided on the inner wall surface of the through hole and having resistance to a copper etchant, and a copper layer provided on the intermediate layer. A wiring board, characterized in that: 3. A wiring board in which copper wiring layers formed on both sides of a wiring board are connected by conductive layers formed on inner wall surfaces and peripheral portions thereof through through holes provided in the wiring board. In the above, the copper wiring layer and a thin-film copper layer provided on the inner wall surface of the through hole, a conductive intermediate layer provided on the thin-film copper layer and having resistance to a copper etchant, A wiring board, wherein the conductive layer is composed of the provided thick-film copper layer and a solder layer provided on the thick-film copper layer. 4. A wiring board in which copper wiring layers formed on both sides of the wiring board are connected by conductive layers formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. In the above, the copper wiring layer and a thin-film copper layer provided on the inner wall surface of the through hole, a conductive intermediate layer provided on the thin-film copper layer and having resistance to a copper etchant, A thick copper layer provided,
A wiring board comprising the conductive layer described above. 5. The wiring board according to claim 1, wherein said wiring board is a multilayer wiring board formed by laminating a plurality of circuit boards for an inner layer via an insulating adhesive layer. 6. The method according to claim 1, wherein the intermediate layer is made of gold, nickel, rhodium,
The wiring board according to claim 1, wherein the wiring board is made of tin. 7. A wiring board in which copper wiring layers formed on both sides of the wiring board are connected by conductive layers formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. A method of forming a through-hole in a wiring board in which a copper film is uniformly laminated on both side surfaces thereof, and the above-described copper film except for a peripheral portion of the through-hole and a portion where a wiring layer is formed. A resist layer forming step of forming a resist layer on the upper surface in a pattern, and a conductive intermediate layer having a resistance to a copper etching agent on a copper coating surface and an inner wall surface of the through hole exposed from the resist layer by an electroless plating method. Forming a copper layer on the intermediate layer, selectively forming a copper layer on the intermediate layer by plating, and selectively forming a solder layer on the copper layer. A layer forming step, and after the resist layer is removed, an etching step of etching the copper film exposed from the solder layer using the solder layer as a mask to form the wiring layer and the conductive layer. Method for manufacturing a wiring board. 8. A wiring board in which copper wiring layers formed on both sides of the wiring board are connected by conductive layers formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. A method of forming a through-hole in a wiring board in which a copper film is uniformly laminated on both side surfaces thereof, and the above-described copper film except for a peripheral portion of the through-hole and a portion where a wiring layer is formed. A resist layer forming step of forming a resist layer on the upper surface in a pattern, and a conductive intermediate layer having a resistance to a copper etchant on a copper coating surface and a through hole inner wall surface exposed from the resist layer is formed by electroless plating. Forming a copper layer on the intermediate layer by plating, and forming a copper layer on the copper layer by using a solder or photosensitive resin. A mask layer forming step of selectively forming a mask layer, an etching step of removing the resist layer, etching a copper film exposed from the mask layer to form the wiring layer and the conductive layer, and A stripping step of stripping and removing the layer to expose the copper layer. 9. A wiring board in which copper wiring layers formed on both sides of the wiring board are connected by conductive layers formed on the inner wall surface and the peripheral portion thereof through through holes provided in the wiring board. A method of forming a through hole in a wiring board having a copper film uniformly laminated on both sides thereof, and forming a film thickness on the copper film surface on both sides of the wiring board and the inner wall surface of the through hole. A thin-film copper layer forming step of depositing a thin-film copper layer having a small thickness by electroless plating, and a resist layer for forming a resist layer in a pattern on the thin-film copper layer except for a peripheral portion of a through hole and a portion for forming a wiring layer Forming an intermediate layer for selectively depositing a conductive intermediate layer having a resistance to a copper etching agent on the thin copper layer exposed from the resist layer by a plating method; A thick copper layer forming step of selectively depositing a thick copper layer having a large thickness by plating, and a solder layer forming step of selectively depositing a solder layer on the thick copper layer, An etching step of forming the wiring layer and the conductive layer by sequentially etching the thin copper layer and the copper film exposed from the solder layer using the solder layer as a mask after removing the resist layer. Characteristic method of manufacturing a wiring board. 10. A wiring board in which copper wiring layers formed on both sides of a wiring board are connected by conductive layers formed on inner wall surfaces and peripheral portions thereof through through holes provided in the wiring board. A method of forming a through hole in a wiring board having a copper film uniformly laminated on both sides thereof, and forming a film thickness on the copper film surface on both sides of the wiring board and the inner wall surface of the through hole. A thin-film copper layer forming step of depositing a thin-film copper layer having a small thickness by electroless plating, and a resist layer for forming a resist layer in a pattern on the thin-film copper layer except for a peripheral portion of a through hole and a portion for forming a wiring layer A forming step, and an intermediate layer forming step of selectively depositing a conductive intermediate layer having resistance to a copper etching agent on the thin film copper layer exposed from the resist layer by a plating method; A thick copper layer forming step of selectively depositing a thick copper layer having a large film thickness on the layer by a plating method, and selectively forming a mask layer made of solder or a photosensitive resin on the thick copper layer. Forming a wiring layer and a conductive layer by sequentially etching the thin copper layer and the copper film exposed from the mask layer after removing the resist layer, and forming the mask layer. A stripping step of stripping off and exposing the thick copper layer to form a wiring board. 11. The method for manufacturing a wiring board according to claim 7, wherein said wiring board is a multilayer wiring board in which a plurality of circuit boards for an inner layer are laminated via an insulating adhesive layer. 12. The method for manufacturing a wiring board according to claim 7, wherein said intermediate layer is made of gold, nickel, rhodium or tin.