JP3056865B2 - Manufacturing method of printed wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board by an additive method.

[0002]

2. Description of the Related Art In recent years, miniaturization, high performance, and multifunctionality of electronic devices have been promoted, and high density and high reliability by fine patterns have been demanded for printed wiring boards used therein. I have.

Conventionally, as a method of forming a conductive circuit on a printed wiring board, a subtractive method of forming a conductive circuit by laminating a copper foil on an insulating substrate and then performing photoetching has been widely used. According to this method, a conductor circuit having excellent adhesion to an insulating substrate can be formed, but a so-called undercut occurs due to a large etching depth required when forming a pattern by etching, so that a high-precision fine pattern is formed. However, there is a problem that it is difficult to obtain high density and it is difficult to cope with high density.

For this reason, as an alternative to the subtractive method, a full additive method of forming a conductive circuit only by electroless copper plating (chemical copper plating) or a method of forming a conductive pattern by etching a copper-clad laminate, Attention has been paid to a partial additive method in which a conductor is formed only in a through-hole portion by electroless copper plating.

[0005] As one of the full additive methods,
There are the following. First, after forming an adhesive layer on the surface of a substrate (base material), a through hole is formed, and a catalyst (for example, palladium) for chemical copper plating is applied. Next, a photosensitive plating resist film is formed on the surface of the adhesive layer, and after exposure through an exposure mask, development is performed to form a plating resist layer in a portion other than the portion where the plating layer is to be formed. Next, after activating the catalyst, the substrate is immersed in a plating solution to form a chemical copper plating layer (conductor pattern) at a desired location.

Since the plating resist has a poor solubility in a developing solution in order to secure the resistance to a chemical copper plating solution, the melting residue may enter the through-holes after development and may partially remain in the adhesive layer after development. Therefore, in the development process of the plating resist, after developing with a developing solution, spray water washing is carried out in order to surely remove the melting residue of the plating resist entering the through hole and the plating resist adhering to the surface of the adhesive layer. Is going.

[0007] At the time of the spray washing, a part of the catalyst adhering to the surface of the adhesive layer drops off. Therefore,
When the catalyst is applied to the adhesive layer, it is applied in excess of the amount required for the first deposition of the chemical copper plating. Therefore, an excess catalyst exists between the plating resist layer and the adhesive layer.

[0008]

The plating resist layer must play a role in ensuring insulation between the conductor patterns independent of each other. However, as shown in FIG. 7, the catalyst 40 adheres not only between the roughened surface of the adhesive layer 42 formed on the surface of the base material 41 and the plating layer (conductor pattern) 43 but also to the plating resist layer 44. Excess catalyst 40 is also present between layer 42 and between plating resist layer 44 and adhesive layer 42. As a result, there is a problem that insulation resistance is reduced and insulation reliability is reduced.

The present invention has been made in view of the above problems, and an object of the present invention is to increase the insulation resistance by reducing the amount of a catalyst present between a plating resist layer and an adhesive layer. It is an object of the present invention to provide a method for manufacturing a printed wiring board which can enhance insulation reliability and form a high-density conductive circuit utilizing the advantages of the additive method.

[0010]

Means for Solving the Problems In order to achieve the above object, according to the present invention, when a printed wiring board is manufactured by an additive method, a catalyst is applied to the surface of an adhesive layer formed on the surface of a base material . Wash the surface of the adhesive layer with water
Remove the weakly adsorbing catalyst on the layer surface, and then plating
A resist layer is formed, and the pressure at the time of washing the surface of the adhesive layer with the water is
Washed again with the following pressure to activate the catalyst
Thereafter, the formation of the chemical plating layer was sequentially performed.

[0011]

The catalyst is applied to the roughened surface of the adhesive layer formed on the surface of the base material in excess of the amount required for forming the chemical plating layer. Next, the surface of the adhesive layer is washed with water at a pressure equal to or higher than the pressure at the time of washing after development of the plating resist. At this time, a part of the catalyst excessively applied, which has a weak adsorption power to the adhesive layer, falls off. Next, exposure and development are performed to form a plating resist layer, and the surface of the adhesive layer is washed again with water.
After activation treatment of the catalyst, formation of the chemical plating layer are sequentially performed.

A catalyst exists between the plating resist layer and the adhesive layer as in the conventional additive method. However, the amount is smaller than that at the time of applying the catalyst, and is close to the minimum necessary for forming the chemical plating layer. Unlike the conventional case, the insulation resistance is increased and the insulation reliability is improved.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention in which a printed wiring board is manufactured by a full additive method will be described below.

An adhesive is applied to the surface of the glass epoxy substrate 1 to form an adhesive layer 2. After the adhesive layer 2 is cured, the surface of the adhesive layer 2 is roughened by immersion in a chromic acid aqueous solution (see FIG. 1). 1). In this embodiment, as an adhesive for forming the adhesive layer 2, 40 parts by weight of a bisphenol A type epoxy resin (manufactured by Yuka Shell, trade name: E-1001) and a phenol novolak type epoxy resin (manufactured by Yuka Shell, product) Name: E
-154) 60 parts by weight, 5 parts by weight of an imidazole-type curing agent (manufactured by Shikoku Chemicals, trade name: 2PHZ), and epoxy resin fine particles (manufactured by Toray, trade name: Trepal EP-B, average particle size: 0.5 μm) 10 Parts by weight and epoxy resin fine particles (trade name: Toray Pearl EP-B, manufactured by Toray Industries, Ltd., average particle size: 5.5 μm)
m) A mixture prepared by stirring and mixing 25 parts by weight and 75 parts by weight of butyl cellosolve acetate with a three-roller was used.

Next, a palladium catalyst 3 was applied to the surface of the adhesive layer 2 using a commercially available chemical copper plating nucleus providing system (manufactured by Shipley Co., Ltd.) (the state of FIG. 2). At this time, the amount of the catalyst 3 applied to the surface of the adhesive layer 2 is
The palladium amount was 2.5 μg / cm ² in excess of the amount required for forming the chemical copper plating layer 5.

Next, the surface of the adhesive layer 2 was spray-washed under a water pressure of 3 kg / cm ² . By this spray water washing, the amount of palladium of the catalyst 3 which was 2.5 μg / cm ² at the time of application was reduced to 2.0 μg / cm ² (state of FIG. 3).
Incidentally, the value of 2.0 μg / cm ^{2 of the} amount of palladium is:
This is the minimum value required for forming the chemical copper plating layer 5.

Next, a dry film plating resist is laminated on the surface of the adhesive layer 2, exposed through an exposure mask, and a desired pattern is baked, followed by development to form a plating resist layer 4 (the state of FIG. 4). . As shown in FIG. 6, the exposure mask has a pair of comb-tooth patterns arranged opposite to each other, that is, a constant line width L.
(100 μm) lines were arranged at a constant interval S (100 μm), and the length to both ends between the comb-tooth patterns indicated by a chain line was 500 mm.

Next, after development of the dry film plating resist, the resist was spray-washed at a water pressure of 2.0 kg / cm ² . At this time, the catalyst 3 adhering to the surface of the adhesive layer 2
Did not fall off the adhesive layer 2.

The reason for this is that the water pressure of the spray rinsing at this time is lower than the water pressure of the spray rinsing before the plating resist layer 4 is formed, and the catalyst 3 adhering to the surface of the adhesive layer 2 has a pressure of 3 kg / cm ² . This is because the catalyst 3 did not fall off from the surface of the adhesive layer 2 even when it was sprayed and washed with water pressure. This is supported by the fact that the measurement result of the amount of palladium of the catalyst 3 adhering to the surface of the adhesive layer 2 not covered with the plating resist layer 4 was 2.0 μg / cm ² .

Next, after the catalyst 3 exposed on the surface of the adhesive layer 2 is activated, a thickness of 25 μm is applied by chemical copper plating.
m of the plating layer 5 was formed. The amount of palladium in the catalyst 3 on the adhesive layer 2 was measured by atomic absorption analysis. The sample solution was prepared by converting the substrate 1 to which the catalyst 3 was applied with nitric acid (HNO
₃ ) It was prepared by immersing in palladium to dissolve palladium.

As a result of measuring the insulation resistance when a bias voltage of 100 V DC was applied to the printed wiring board formed as described above for 1 minute, the insulation resistance was about 1.0 × 10 ¹³ Ω.

(Comparative Example) A printed wiring board was formed in the same manner as in the above example, except for a spray washing step before the formation of the plating resist layer 4. As a result of measuring the insulation resistance when a bias voltage of 100 V DC was applied to the printed wiring board for 1 minute in the same manner as described above, it was about 2.0 × 10 ¹² Ω.

As described above, according to the method for manufacturing a printed wiring board of this embodiment, the insulation resistance of the printed wiring board is higher than that of the conventional manufacturing method, and the insulation reliability is improved. The present invention is not limited to the above-described embodiment. For example, instead of a combination of an epoxy resin solution and an epoxy resin fine particle as an adhesive, another combination disclosed in JP-A-61-276875 is used. An adhesive may be used.
Further, the present invention may be applied to the manufacture of a printed wiring board by other additive methods such as a partial additive method other than the full additive method, or may be applied to a case where a conductive circuit is formed by chemical plating of a metal other than copper.

[0024]

As described above in detail, according to the present invention, even if the same amount of catalyst is present between the plating resist layer and the adhesive layer as that between the plating layer and the adhesive layer, the amount of the catalyst is reduced. Since the value can be set to a value close to the minimum required for forming the plating layer, the insulation resistance is increased unlike the conventional one. Therefore, even if the conductor circuit is formed at a high density, the desired insulation reliability is secured, and as a result, the advantage of forming a high-precision fine pattern which is an advantage of the additive method can be utilized.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a printed wiring board according to the present invention, in a state where an adhesive layer is formed on a substrate surface.

FIG. 2 is a schematic sectional view showing a state in which a catalyst is excessively applied to the surface of an adhesive layer.

FIG. 3 is a schematic cross-sectional view showing a state where spray washing with water is performed from the state of FIG. 2 and a catalyst excessively applied to the surface of the adhesive layer is dropped from the surface of the adhesive layer.

FIG. 4 is a schematic cross-sectional view showing a state where a plating resist layer is formed on an adhesive layer.

FIG. 5 is a schematic cross-sectional view showing a state where a plating layer is formed.

FIG. 6 is a schematic plan view showing a pattern shape of an exposure mask.

FIG. 7 is a schematic cross-sectional view showing a state in which a plating layer is formed in a conventional technique.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Base material, 2 ... Adhesion layer, 3 ... Catalyst, 4 ... Plating resist layer, 5 ... Plating layer.

Claims (1)

(57) [Claims] 1. A method for manufacturing a printed wiring board by an additive method, comprising: applying a catalyst (3) to a surface of an adhesive layer (2) formed on a surface of a substrate (1); The surface is washed with water, and the adhesive force of the surface of the adhesive layer (2) is weak.
After removing the catalyst (3) , a plating resist layer (4) is formed, and the surface of the adhesive layer (2) is subjected to the pressure at the time of the water washing.
Again washed at pressures force the activation treatment of the catalyst (3)
A method for manufacturing a printed wiring board, comprising , after performing the steps, sequentially forming a chemical plating layer (5).