JPS5846698A - Method of producing printed circuit board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board (hereinafter referred to as a wiring board), and in particular, to selectively form a catalytic metal layer on the inner wall surface of a through hole by a photochemical reaction, and further by electroless plating. The present invention relates to a method of manufacturing a wiring board on which a conductor layer is formed.

In recent years, as electronic devices such as ICs and LSIs have become more highly integrated, circuit patterns have become thinner, through-holes have smaller diameters, and the number of layers has increased in order to improve the packaging density of wiring boards. There is a growing trend towards increasing plate thickness. Ninth, when manufacturing wiring boards, it is necessary to achieve high precision from the viewpoint of high electrical dependence. On the other hand, considering mass production, it is also important to maintain a high yield during manufacturing.

As a countermeasure to these problems, various attempts have been made to make circuit patterns thinner and more precise, using both etched foil methods and additive methods.

In the former etched foil method, attempts have been made to make the copper foil extremely thin (hereinafter referred to as UTC foil), to equalize the electroplating thickness, and to improve photoresist printing equipment for photo printing.

However, it is particularly difficult to make the film thickness uniform in electroplating K, which hinders thinning of the circuit pattern with high accuracy.

On the other hand, in the latter additive method, it is difficult to ensure adhesive strength between the circuit pattern and the laminate due to the thin circuit pattern. Furthermore, in the case of a multilayer board with a conductor layer on the inner layer, the surface of the laminate is usually roughened and etched with a mixture of chromic acid and sulfuric acid in order to firmly bond the circuit pattern and the laminate. At this time, the conductor layer exposed on the inner wall of the hole is etched at the same time, which is undesirable since it adversely affects the reliability of the inner layer conductor.

In addition, although the electroless copper plating layer that forms the circuit pattern has physical properties that are inferior to the electrolytic steel plating layer, the laminate has a large coefficient of linear expansion. cannot withstand this, and in applications involving thermal factors, circuit pattern disconnections occur frequently, which is unfavorable in terms of reliability.

When the through-hole diameter of the board is small and the board thickness is thick, that is, when the hole diameter to board thickness ratio (aspect ratio) becomes large, it is extremely difficult to apply plating uniformly to the inner wall of the through-hole using electroplating. In the literature, Copper Brating Advanced Multilayer Board (”
Copper platingAdvance@d Mu
ltilayer Boods, (I PC.

According to 1976 Fm1l Msetting)), when the aspect ratio is 1:6, the plating coverage is 90%,
When the aspect ratio is 1:10, the coverage of the plating is 70%, which is insufficient for a high-density wiring board.

On the other hand, in the additive method, according to the above literature, even if the aspect ratio becomes large, the coverage of the plating is sufficient.
It becomes 00%. However, as mentioned above, for multilayer boards containing conductor circuits in the inner layers, there is a problem in the reliability of the inner layer connections, and this cannot be said to be a sufficient manufacturing method for high-density wiring boards.

The purpose of the present invention has been made to solve the drawbacks of the conventional manufacturing method, and is to provide a small-diameter hole drilled in the inner wall of a thick board having a fine-lined, high-precision pattern. An object of the present invention is to provide a method for manufacturing a wiring board that forms a uniform conductor layer.

How to use the characteristic Nil-Ho-Prito wiring board■
A process in which a dry film that serves as an etching resist is formed on a copper-clad laminate and etched to form a conductor pattern.

■Drilling a hole at a desired position in the laminate.

■A photosensitive catalyst on the surface of the laminate and the pore walls.■Ultraviolet light on the pore surface of the laminate! A step of depositing catalyst metal on the pore wall surface through a development treatment under the conditions of illumination.

(2) A step of immersing the laminate in an electroless plating solution to form a conductor layer on the hole wall surface.

The present invention f7I will be explained below based on FIG.

Figure 1 shows an Ilr view of a multilayer laminate (hereinafter referred to as laminate) 1 with a conductive pattern of gold on the inner layer, and the surface is a copper foil 2.
It is made up of layers. After covering the laminated board 1 with an eratin resistor such as a dry film, a known etching method is used to remove the non-desired portions of the copper foil 2, and a 2m conductive circuit pattern (hereinafter abbreviated as circuit pattern) is formed on the surface. form. (＠Figure 1＠) Next K, circuit pattern 2af: A plating-resistant coating material is applied to the surface of the laminate plate 1 to be protected, thereby forming a permanent protective mask 3i.゛ (Fig. 1 0) Drill through holes (hereinafter referred to as holes) 4 at desired locations in the laminate 1 using a drill without fail (Fig. 8g 1■) Next, use a drill to drill through holes 4. Photoform photosensitive liquid T-laminated plate 1, as disclosed in Japanese Patent No. 9SS, is coated on the surface of the laminated plate 1 and on the inner walls of the holes 4 to form the photosensitive layer 5.

([Figure 1 @). Next, a perforated negative film 6 for exposing only the inner walls of the holes 4 is closely attached to the surface of the laminate 1o, and ultraviolet light is irradiated from both the upper and lower surfaces to reduce the photosensitive layer 5f on the inner walls of the holes 4 (Fig. 1). [F]).

Next, the laminate 1 with the photosensitive layer 5 on the inner wall of the hole 4 reduced to PH1
A catalytic metal layer 5 is formed on the surface of the hole 4011 by developing with a formalin solution of 2.5 or more and 3 to 4% by volume, and removing the vermilion photosensitive layer 5 other than the wall surface of the hole 4.
Figure 1 Q). Next, when this laminated plate 1t-thick plate like CP-70 manufactured by Chevre is immersed in an electroless copper plating solution, the catalytic metal layer 5a becomes a core and the copper conductor layer 7 is immersed.
is formed on the inner wall of the hole 4, and a conductor circuit is formed in the laminated plate l to conduct the front and back surfaces. (Fig. 10) As described above, according to the present invention, (1) only copper of a fixed thickness is etched without plating on the surface of a copper-clad laminate, so that the conventional circuit width is 0.
,1~0.15■・Tolerance ±0.03■
High precision can be achieved with tolerances of ±〇 and O1”.

(M) Also, even with a circuit pattern made into fine lines of about 0.1', stable adhesive strength that can sufficiently withstand thermal factors can be obtained.

(iii) Since electroless steel plating is applied selectively only to the inner wall of the hole, the consumption of deposited steel is approximately 1/10, resulting in a significant cost reduction compared to the full additive method in which electroless copper plating is applied to the circuit pattern. Become.

(iv) Even if the aspect ratio is large, plating with uniform thickness can be obtained and quality can be stabilized.

(V) Since the circuit pattern is formed by the etched foil method, there is no need for roughening etching of the surface of the laminate, which is required in the additive method.

Therefore, a highly reliable multilayer printed wiring board can be obtained without etching the inner conductor layer of the multilayer board.

Incidentally, since the method for manufacturing a printed wiring board of the present invention can also be employed in the manufacturing process of a multi-wire wiring board, it goes without saying that it is particularly effective from the viewpoints of high precision and economy.

[Brief explanation of the drawing]

811(G) to 811(G) to 811(G) to 811(G) are process diagrams showing the method for manufacturing a printed wiring board of the present invention. l... (copper cladding with conductor pattern on the inner layer)
Laminated board, 2... Surface layer copper foil, 2 &...
・Conductor circuit pattern, 3... Retention [% -r S/, 4... Holes, 5... Photosensitive catalyst layer, 5a... (Reduction ) dissolving metal layer, 6...
...Pore negative film, 7... (Electroless steel plating -1@

Claims (1)

[Scope of Claims] A method for producing a printed wiring board characterized by having the following weight a. ■The process of forming a pattern on a copper-clad laminate using a dry film or resist ink that serves as an etching resist, and then etching it to form a conductor pattern. (2) A step of forming holes at desired positions in the laminate. (2) A step of applying a photosensitive catalyst liquid to the surface of the laminate and the pore walls. (2) A step of irradiating the pore wall surfaces of the laminate with ultraviolet rays and depositing catalyst metal on the pore wall surfaces through a development process. (2) A step of immersing the laminate in electroless plating solution Kfl to form a conductor layer on the hole wall surface.