JPS59172776A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59172776A
JPS59172776A JP58047022A JP4702283A JPS59172776A JP S59172776 A JPS59172776 A JP S59172776A JP 58047022 A JP58047022 A JP 58047022A JP 4702283 A JP4702283 A JP 4702283A JP S59172776 A JPS59172776 A JP S59172776A
Authority
JP
Japan
Prior art keywords
layer
resist
active layer
manufacturing
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58047022A
Other languages
English (en)
Japanese (ja)
Other versions
JPH028454B2 (enrdf_load_stackoverflow
Inventor
Toshimasa Ishida
俊正 石田
Toshio Nonaka
野中　敏夫
Nagayasu Yamagishi
山岸　長保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP58047022A priority Critical patent/JPS59172776A/ja
Publication of JPS59172776A publication Critical patent/JPS59172776A/ja
Publication of JPH028454B2 publication Critical patent/JPH028454B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes

Landscapes

  • Junction Field-Effect Transistors (AREA)
JP58047022A 1983-03-23 1983-03-23 半導体装置の製造方法 Granted JPS59172776A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58047022A JPS59172776A (ja) 1983-03-23 1983-03-23 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58047022A JPS59172776A (ja) 1983-03-23 1983-03-23 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59172776A true JPS59172776A (ja) 1984-09-29
JPH028454B2 JPH028454B2 (enrdf_load_stackoverflow) 1990-02-23

Family

ID=12763552

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58047022A Granted JPS59172776A (ja) 1983-03-23 1983-03-23 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59172776A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6457680A (en) * 1987-03-18 1989-03-03 Fujitsu Ltd Compound semiconductor integrated circuit device
EP2498295A1 (en) * 2011-03-09 2012-09-12 Soitec Method for forming a Ge on III/V-On-Insulator structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106082A (en) * 1980-12-23 1982-07-01 Nippon Telegr & Teleph Corp <Ntt> Manufacture of schottky junction type electric field effect transistor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57106082A (en) * 1980-12-23 1982-07-01 Nippon Telegr & Teleph Corp <Ntt> Manufacture of schottky junction type electric field effect transistor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6457680A (en) * 1987-03-18 1989-03-03 Fujitsu Ltd Compound semiconductor integrated circuit device
EP2498295A1 (en) * 2011-03-09 2012-09-12 Soitec Method for forming a Ge on III/V-On-Insulator structure
FR2972567A1 (fr) * 2011-03-09 2012-09-14 Soitec Silicon On Insulator Méthode de formation d'une structure de ge sur iii/v sur isolant
US9018678B2 (en) 2011-03-09 2015-04-28 Soitec Method for forming a Ge on III/V-on-insulator structure

Also Published As

Publication number Publication date
JPH028454B2 (enrdf_load_stackoverflow) 1990-02-23

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