JPS59134874A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS59134874A
JPS59134874A JP58007243A JP724383A JPS59134874A JP S59134874 A JPS59134874 A JP S59134874A JP 58007243 A JP58007243 A JP 58007243A JP 724383 A JP724383 A JP 724383A JP S59134874 A JPS59134874 A JP S59134874A
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
auge
eutectic
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58007243A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0516189B2 (enrdf_load_stackoverflow
Inventor
Shuichi Shimizu
修一 清水
Kazuo Kanbayashi
神林　和男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58007243A priority Critical patent/JPS59134874A/ja
Publication of JPS59134874A publication Critical patent/JPS59134874A/ja
Publication of JPH0516189B2 publication Critical patent/JPH0516189B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
JP58007243A 1983-01-21 1983-01-21 半導体装置の製造方法 Granted JPS59134874A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58007243A JPS59134874A (ja) 1983-01-21 1983-01-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58007243A JPS59134874A (ja) 1983-01-21 1983-01-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59134874A true JPS59134874A (ja) 1984-08-02
JPH0516189B2 JPH0516189B2 (enrdf_load_stackoverflow) 1993-03-03

Family

ID=11660564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58007243A Granted JPS59134874A (ja) 1983-01-21 1983-01-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59134874A (enrdf_load_stackoverflow)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02501609A (ja) * 1987-10-09 1990-05-31 ヒューズ・エアクラフト・カンパニー ラングミュア・ブロジェット絶縁層を有するＧａＡｓ電気回路装置
US6686616B1 (en) * 2000-05-10 2004-02-03 Cree, Inc. Silicon carbide metal-semiconductor field effect transistors
US6902964B2 (en) 2001-10-24 2005-06-07 Cree, Inc. Methods of fabricating delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure
US6956239B2 (en) 2002-11-26 2005-10-18 Cree, Inc. Transistors having buried p-type layers beneath the source region
JP2005311151A (ja) * 2004-04-23 2005-11-04 Japan Science & Technology Agency 格子整合トンネルダイオードの製造方法および格子整合トンネルダイオード
US7265399B2 (en) 2004-10-29 2007-09-04 Cree, Inc. Asymetric layout structures for transistors and methods of fabricating the same
US7326962B2 (en) 2004-12-15 2008-02-05 Cree, Inc. Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same
US7348612B2 (en) 2004-10-29 2008-03-25 Cree, Inc. Metal-semiconductor field effect transistors (MESFETs) having drains coupled to the substrate and methods of fabricating the same
US7402844B2 (en) 2005-11-29 2008-07-22 Cree, Inc. Metal semiconductor field effect transistors (MESFETS) having channels of varying thicknesses and related methods
US7646043B2 (en) 2006-09-28 2010-01-12 Cree, Inc. Transistors having buried p-type layers coupled to the gate
US8203185B2 (en) 2005-06-21 2012-06-19 Cree, Inc. Semiconductor devices having varying electrode widths to provide non-uniform gate pitches and related methods

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132533A (enrdf_load_stackoverflow) * 1974-09-10 1976-03-19 Teijin Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132533A (enrdf_load_stackoverflow) * 1974-09-10 1976-03-19 Teijin Ltd

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02501609A (ja) * 1987-10-09 1990-05-31 ヒューズ・エアクラフト・カンパニー ラングミュア・ブロジェット絶縁層を有するＧａＡｓ電気回路装置
US6686616B1 (en) * 2000-05-10 2004-02-03 Cree, Inc. Silicon carbide metal-semiconductor field effect transistors
US7067361B2 (en) 2000-05-10 2006-06-27 Cree, Inc. Methods of fabricating silicon carbide metal-semiconductor field effect transistors
US6906350B2 (en) 2001-10-24 2005-06-14 Cree, Inc. Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure
US6902964B2 (en) 2001-10-24 2005-06-07 Cree, Inc. Methods of fabricating delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure
US6956239B2 (en) 2002-11-26 2005-10-18 Cree, Inc. Transistors having buried p-type layers beneath the source region
US7297580B2 (en) 2002-11-26 2007-11-20 Cree, Inc. Methods of fabricating transistors having buried p-type layers beneath the source region
JP2005311151A (ja) * 2004-04-23 2005-11-04 Japan Science & Technology Agency 格子整合トンネルダイオードの製造方法および格子整合トンネルダイオード
US7265399B2 (en) 2004-10-29 2007-09-04 Cree, Inc. Asymetric layout structures for transistors and methods of fabricating the same
US7348612B2 (en) 2004-10-29 2008-03-25 Cree, Inc. Metal-semiconductor field effect transistors (MESFETs) having drains coupled to the substrate and methods of fabricating the same
US7326962B2 (en) 2004-12-15 2008-02-05 Cree, Inc. Transistors having buried N-type and P-type regions beneath the source region and methods of fabricating the same
US8203185B2 (en) 2005-06-21 2012-06-19 Cree, Inc. Semiconductor devices having varying electrode widths to provide non-uniform gate pitches and related methods
US7402844B2 (en) 2005-11-29 2008-07-22 Cree, Inc. Metal semiconductor field effect transistors (MESFETS) having channels of varying thicknesses and related methods
US7646043B2 (en) 2006-09-28 2010-01-12 Cree, Inc. Transistors having buried p-type layers coupled to the gate
US7943972B2 (en) 2006-09-28 2011-05-17 Cree, Inc. Methods of fabricating transistors having buried P-type layers coupled to the gate

Also Published As

Publication number Publication date
JPH0516189B2 (enrdf_load_stackoverflow) 1993-03-03

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