JPS59125638A - 半導体素子分離の製造方法 - Google Patents
半導体素子分離の製造方法Info
- Publication number
- JPS59125638A JPS59125638A JP31483A JP31483A JPS59125638A JP S59125638 A JPS59125638 A JP S59125638A JP 31483 A JP31483 A JP 31483A JP 31483 A JP31483 A JP 31483A JP S59125638 A JPS59125638 A JP S59125638A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon
- oxide film
- groove
- nitride film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002955 isolation Methods 0.000 title claims description 14
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000004065 semiconductor Substances 0.000 title claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 27
- 239000010703 silicon Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 13
- 238000005530 etching Methods 0.000 claims abstract description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 15
- 102000004190 Enzymes Human genes 0.000 claims 1
- 108090000790 Enzymes Proteins 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 230000003647 oxidation Effects 0.000 abstract description 12
- 238000007254 oxidation reaction Methods 0.000 abstract description 12
- 239000012212 insulator Substances 0.000 abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 3
- 150000004767 nitrides Chemical class 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 230000035515 penetration Effects 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 210000004907 gland Anatomy 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000005204 segregation Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000009271 trench method Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31483A JPS59125638A (ja) | 1983-01-05 | 1983-01-05 | 半導体素子分離の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31483A JPS59125638A (ja) | 1983-01-05 | 1983-01-05 | 半導体素子分離の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59125638A true JPS59125638A (ja) | 1984-07-20 |
JPS6351537B2 JPS6351537B2 (enrdf_load_stackoverflow) | 1988-10-14 |
Family
ID=11470446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31483A Granted JPS59125638A (ja) | 1983-01-05 | 1983-01-05 | 半導体素子分離の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59125638A (enrdf_load_stackoverflow) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340337A (ja) * | 1986-07-07 | 1988-02-20 | テキサス インスツルメンツ インコ−ポレイテツド | 集積回路分離法 |
US4892614A (en) * | 1986-07-07 | 1990-01-09 | Texas Instruments Incorporated | Integrated circuit isolation process |
JPH09153542A (ja) * | 1995-11-30 | 1997-06-10 | Nec Corp | 半導体装置の製造方法 |
KR100329606B1 (ko) * | 1995-06-02 | 2002-10-25 | 주식회사 하이닉스반도체 | 반도체소자의소자분리절연막형성방법 |
KR100361762B1 (ko) * | 1995-11-06 | 2003-02-11 | 주식회사 하이닉스반도체 | 반도체소자의소자분리방법 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02179246A (ja) * | 1988-12-28 | 1990-07-12 | Fanuc Ltd | ビルトインモータのステータ構造 |
JPH0617345U (ja) * | 1992-07-22 | 1994-03-04 | 東洋電機製造株式会社 | フレーム無しの交流機の固定子 |
-
1983
- 1983-01-05 JP JP31483A patent/JPS59125638A/ja active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6340337A (ja) * | 1986-07-07 | 1988-02-20 | テキサス インスツルメンツ インコ−ポレイテツド | 集積回路分離法 |
US4892614A (en) * | 1986-07-07 | 1990-01-09 | Texas Instruments Incorporated | Integrated circuit isolation process |
KR100329606B1 (ko) * | 1995-06-02 | 2002-10-25 | 주식회사 하이닉스반도체 | 반도체소자의소자분리절연막형성방법 |
KR100361762B1 (ko) * | 1995-11-06 | 2003-02-11 | 주식회사 하이닉스반도체 | 반도체소자의소자분리방법 |
JPH09153542A (ja) * | 1995-11-30 | 1997-06-10 | Nec Corp | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JPS6351537B2 (enrdf_load_stackoverflow) | 1988-10-14 |
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