JPS59123029A - レジスタ制御方式 - Google Patents

レジスタ制御方式

Info

Publication number
JPS59123029A
JPS59123029A JP22928282A JP22928282A JPS59123029A JP S59123029 A JPS59123029 A JP S59123029A JP 22928282 A JP22928282 A JP 22928282A JP 22928282 A JP22928282 A JP 22928282A JP S59123029 A JPS59123029 A JP S59123029A
Authority
JP
Japan
Prior art keywords
control
register
data
bit
parameters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22928282A
Other languages
English (en)
Japanese (ja)
Other versions
JPS612983B2 (enrdf_load_stackoverflow
Inventor
Makoto Katsuyama
勝山　真
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22928282A priority Critical patent/JPS59123029A/ja
Publication of JPS59123029A publication Critical patent/JPS59123029A/ja
Publication of JPS612983B2 publication Critical patent/JPS612983B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP22928282A 1982-12-29 1982-12-29 レジスタ制御方式 Granted JPS59123029A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22928282A JPS59123029A (ja) 1982-12-29 1982-12-29 レジスタ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22928282A JPS59123029A (ja) 1982-12-29 1982-12-29 レジスタ制御方式

Publications (2)

Publication Number Publication Date
JPS59123029A true JPS59123029A (ja) 1984-07-16
JPS612983B2 JPS612983B2 (enrdf_load_stackoverflow) 1986-01-29

Family

ID=16889670

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22928282A Granted JPS59123029A (ja) 1982-12-29 1982-12-29 レジスタ制御方式

Country Status (1)

Country Link
JP (1) JPS59123029A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01143366U (enrdf_load_stackoverflow) * 1988-03-22 1989-10-02

Also Published As

Publication number Publication date
JPS612983B2 (enrdf_load_stackoverflow) 1986-01-29

Similar Documents

Publication Publication Date Title
US5093783A (en) Microcomputer register bank accessing
US5442765A (en) Database system which adjusts the data storage order based on the processing speed of the storage media
US5559533A (en) Virtual memory hardware cusor and method
US5446859A (en) Register addressing control circuit including a decoder and an index register
US4672538A (en) Method of dynamically changing formation of addresses in memory of a data processing system
JPS59123029A (ja) レジスタ制御方式
JPS6334795A (ja) 半導体記憶装置
JP2595992B2 (ja) 電子楽器
JPH0424852A (ja) マルチポートアクセス方式
JPS6148174B2 (enrdf_load_stackoverflow)
JPS62290936A (ja) アドレス制御回路
JP2758745B2 (ja) 記憶回路
JPH0739086Y2 (ja) Ｆｄｄコントロ−ル回路
JPH05225044A (ja) メモリ集積回路
JPH01169645A (ja) メモリ装置
JPS6039265A (ja) デ−タ転送方式
JPS62151955A (ja) メモリアドレツシング方式
JPH0740243B2 (ja) 情報処理装置
JPH08339328A (ja) バンクメモリ切換回路
JPS6058493B2 (ja) 情報処理装置
JPH04321105A (ja) 位置決め制御方法
JPS61133451A (ja) メモリシステム
JPS6214191A (ja) 表示用メモリシステム
JPS63225836A (ja) 記憶装置
JPH0447867A (ja) フェード処理装置