JPS59116858A - マシンチエツク割込み処理方式 - Google Patents

マシンチエツク割込み処理方式

Info

Publication number
JPS59116858A
JPS59116858A JP57228855A JP22885582A JPS59116858A JP S59116858 A JPS59116858 A JP S59116858A JP 57228855 A JP57228855 A JP 57228855A JP 22885582 A JP22885582 A JP 22885582A JP S59116858 A JPS59116858 A JP S59116858A
Authority
JP
Japan
Prior art keywords
machine check
signal
interrupt
mcic
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57228855A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6322339B2 (cg-RX-API-DMAC7.html
Inventor
Toshio Matsumoto
敏雄 松本
Motokazu Kato
加藤　元計
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57228855A priority Critical patent/JPS59116858A/ja
Priority to AU21466/83A priority patent/AU544915B2/en
Priority to CA000441404A priority patent/CA1204876A/en
Priority to US06/554,730 priority patent/US4587654A/en
Priority to KR1019830005757A priority patent/KR890001796B1/ko
Priority to EP83307470A priority patent/EP0112672B1/en
Priority to DE8383307470T priority patent/DE3380369D1/de
Priority to BR8307085A priority patent/BR8307085A/pt
Priority to ES528305A priority patent/ES8501902A1/es
Publication of JPS59116858A publication Critical patent/JPS59116858A/ja
Publication of JPS6322339B2 publication Critical patent/JPS6322339B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)
  • Computer And Data Communications (AREA)
JP57228855A 1982-12-23 1982-12-23 マシンチエツク割込み処理方式 Granted JPS59116858A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP57228855A JPS59116858A (ja) 1982-12-23 1982-12-23 マシンチエツク割込み処理方式
AU21466/83A AU544915B2 (en) 1982-12-23 1983-11-17 Processing machine check interruption
CA000441404A CA1204876A (en) 1982-12-23 1983-11-17 System for processing machine check interruption
US06/554,730 US4587654A (en) 1982-12-23 1983-11-23 System for processing machine check interruption
KR1019830005757A KR890001796B1 (ko) 1982-12-23 1983-12-05 기계체크 개입중단 처리시스템
EP83307470A EP0112672B1 (en) 1982-12-23 1983-12-08 System for processing machine check interruption
DE8383307470T DE3380369D1 (en) 1982-12-23 1983-12-08 System for processing machine check interruption
BR8307085A BR8307085A (pt) 1982-12-23 1983-12-22 Sistema para processamento de interrupcao de verificacao de maquina
ES528305A ES8501902A1 (es) 1982-12-23 1983-12-22 Una instalacion para procesar las interrupciones de comprobacion de maquina

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57228855A JPS59116858A (ja) 1982-12-23 1982-12-23 マシンチエツク割込み処理方式

Publications (2)

Publication Number Publication Date
JPS59116858A true JPS59116858A (ja) 1984-07-05
JPS6322339B2 JPS6322339B2 (cg-RX-API-DMAC7.html) 1988-05-11

Family

ID=16882929

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57228855A Granted JPS59116858A (ja) 1982-12-23 1982-12-23 マシンチエツク割込み処理方式

Country Status (9)

Country Link
US (1) US4587654A (cg-RX-API-DMAC7.html)
EP (1) EP0112672B1 (cg-RX-API-DMAC7.html)
JP (1) JPS59116858A (cg-RX-API-DMAC7.html)
KR (1) KR890001796B1 (cg-RX-API-DMAC7.html)
AU (1) AU544915B2 (cg-RX-API-DMAC7.html)
BR (1) BR8307085A (cg-RX-API-DMAC7.html)
CA (1) CA1204876A (cg-RX-API-DMAC7.html)
DE (1) DE3380369D1 (cg-RX-API-DMAC7.html)
ES (1) ES8501902A1 (cg-RX-API-DMAC7.html)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916697A (en) * 1988-06-24 1990-04-10 International Business Machines Corporation Apparatus for partitioned clock stopping in response to classified processor errors

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028239A (cg-RX-API-DMAC7.html) * 1973-07-11 1975-03-22
JPS51146143A (en) * 1975-06-11 1976-12-15 Hitachi Ltd Wedging process mode when logic device generates error action
JPS57159353A (en) * 1981-03-28 1982-10-01 Fujitsu Ltd Failure processing system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3229251A (en) * 1962-03-26 1966-01-11 Ibm Computer error stop system
US3555517A (en) * 1968-10-30 1971-01-12 Ibm Early error detection system for data processing machine
US3707714A (en) * 1971-01-08 1972-12-26 Honeywell Inc Multiple error detector
JPS50117336A (cg-RX-API-DMAC7.html) * 1973-11-30 1975-09-13
IT1046598B (it) * 1974-05-16 1980-07-31 Honeywell Inf Systems Interfaccia di connessione di apparecchiature periferiche a un calcolatore provvista di meccanismi di segnalazione e di distinzione tradiversi tipi di errore
US4044337A (en) * 1975-12-23 1977-08-23 International Business Machines Corporation Instruction retry mechanism for a data processing system
JPS6032217B2 (ja) * 1979-04-02 1985-07-26 日産自動車株式会社 制御用コンピュ−タのフェィルセ−フ装置
DE3036926C2 (de) * 1980-09-30 1984-07-26 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Steuerung des Arbeitsablaufes in Datenverarbeitungsanlagen mit Mikroprogrammsteuerung

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5028239A (cg-RX-API-DMAC7.html) * 1973-07-11 1975-03-22
JPS51146143A (en) * 1975-06-11 1976-12-15 Hitachi Ltd Wedging process mode when logic device generates error action
JPS57159353A (en) * 1981-03-28 1982-10-01 Fujitsu Ltd Failure processing system

Also Published As

Publication number Publication date
US4587654A (en) 1986-05-06
EP0112672B1 (en) 1989-08-09
AU544915B2 (en) 1985-06-20
AU2146683A (en) 1984-06-28
BR8307085A (pt) 1984-07-31
ES528305A0 (es) 1984-12-01
KR890001796B1 (ko) 1989-05-22
CA1204876A (en) 1986-05-20
KR840007188A (ko) 1984-12-05
EP0112672A2 (en) 1984-07-04
EP0112672A3 (en) 1987-05-13
DE3380369D1 (en) 1989-09-14
ES8501902A1 (es) 1984-12-01
JPS6322339B2 (cg-RX-API-DMAC7.html) 1988-05-11

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