JPS5896742A - 半導体素子の接続方法 - Google Patents

半導体素子の接続方法

Info

Publication number
JPS5896742A
JPS5896742A JP56195922A JP19592281A JPS5896742A JP S5896742 A JPS5896742 A JP S5896742A JP 56195922 A JP56195922 A JP 56195922A JP 19592281 A JP19592281 A JP 19592281A JP S5896742 A JPS5896742 A JP S5896742A
Authority
JP
Japan
Prior art keywords
electrodes
electrode
conductive paste
external circuit
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56195922A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0131690B2 (enExample
Inventor
Ryuichi Toyoda
隆一 豊田
Takeshi Mizutani
武 水谷
Koichi Kawada
耕一 河田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56195922A priority Critical patent/JPS5896742A/ja
Publication of JPS5896742A publication Critical patent/JPS5896742A/ja
Publication of JPH0131690B2 publication Critical patent/JPH0131690B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by conductive adhesives
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces

Landscapes

  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Wire Bonding (AREA)
JP56195922A 1981-12-04 1981-12-04 半導体素子の接続方法 Granted JPS5896742A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56195922A JPS5896742A (ja) 1981-12-04 1981-12-04 半導体素子の接続方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56195922A JPS5896742A (ja) 1981-12-04 1981-12-04 半導体素子の接続方法

Publications (2)

Publication Number Publication Date
JPS5896742A true JPS5896742A (ja) 1983-06-08
JPH0131690B2 JPH0131690B2 (enExample) 1989-06-27

Family

ID=16349208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56195922A Granted JPS5896742A (ja) 1981-12-04 1981-12-04 半導体素子の接続方法

Country Status (1)

Country Link
JP (1) JPS5896742A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013546188A (ja) * 2010-12-03 2013-12-26 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー フレキシブル基板上に電気構成要素を組み立てる方法および装置、ならびに電気構成要素とフレキシブル基板との組立体

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013546188A (ja) * 2010-12-03 2013-12-26 ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー フレキシブル基板上に電気構成要素を組み立てる方法および装置、ならびに電気構成要素とフレキシブル基板との組立体

Also Published As

Publication number Publication date
JPH0131690B2 (enExample) 1989-06-27

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