JPS5892763U - Thick film multilayer substrate - Google Patents

Thick film multilayer substrate

Info

Publication number
JPS5892763U
JPS5892763U JP1981187105U JP18710581U JPS5892763U JP S5892763 U JPS5892763 U JP S5892763U JP 1981187105 U JP1981187105 U JP 1981187105U JP 18710581 U JP18710581 U JP 18710581U JP S5892763 U JPS5892763 U JP S5892763U
Authority
JP
Japan
Prior art keywords
conductor group
thick film
film multilayer
multilayer substrate
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1981187105U
Other languages
Japanese (ja)
Inventor
泰男 井口
柴田　勲夫
荒尾　義範
Original Assignee
沖電気工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 沖電気工業株式会社 filed Critical 沖電気工業株式会社
Priority to JP1981187105U priority Critical patent/JPS5892763U/en
Publication of JPS5892763U publication Critical patent/JPS5892763U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図と第２図は従来の厚膜多層基板の断面図、第３図
は本考案による厚膜多層基板の断面図、第４図は本考案
による厚膜多層基板にＩＣチップを搭載した図を示す。 １．１１．２１・・・・・・セラミック基板、２，１２
゜２２・・・・・・第１の導体群、３．　１３．　２３
・・・・・・中間絶縁層、４．　１４．　２４・・・・
・・第２の導体群、１５・・・・・・絶縁ガラス、２５
・・・・・・ＩＣチップ、２６・・・・・・ボンディン
グワイヤー。Figures 1 and 2 are cross-sectional views of a conventional thick film multilayer board, Figure 3 is a cross-sectional view of a thick film multilayer board according to the present invention, and Figure 4 is a cross-sectional view of a thick film multilayer board according to the present invention with an IC chip mounted thereon. Show the diagram. 1.11.21...Ceramic substrate, 2,12
゜22...First conductor group, 3. 13. 23
...... intermediate insulating layer, 4. 14. 24...
...Second conductor group, 15...Insulating glass, 25
...IC chip, 26...bonding wire.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 平担な表面を有する絶縁基板と、その表面に所定の間隔
で平行に配置される第１の導体群と、該第１の導体群を
薄く覆う中間絶縁層と、該中間絶縁層の上に前記第１の
導体群と平行に前記所定の間隔で第１の導体群に対し半
格子だけずらして配置される第２の導体群とを有するこ
とを特徴とする厚膜多層基板。An insulating substrate having a flat surface, a first conductor group arranged parallel to the surface at a predetermined interval, an intermediate insulating layer thinly covering the first conductor group, and an intermediate insulating layer disposed on the intermediate insulating layer. A thick film multilayer substrate comprising: a second conductor group arranged parallel to the first conductor group at the predetermined interval and shifted by a half lattice with respect to the first conductor group.
JP1981187105U 1981-12-17 1981-12-17 Thick film multilayer substrate Pending JPS5892763U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981187105U JPS5892763U (en) 1981-12-17 1981-12-17 Thick film multilayer substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981187105U JPS5892763U (en) 1981-12-17 1981-12-17 Thick film multilayer substrate

Publications (1)

Publication Number Publication Date
JPS5892763U true JPS5892763U (en) 1983-06-23

Family

ID=29989630

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981187105U Pending JPS5892763U (en) 1981-12-17 1981-12-17 Thick film multilayer substrate

Country Status (1)

Country Link
JP (1) JPS5892763U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019079987A (en) * 2017-10-26 2019-05-23 京セラ株式会社 Electronic element mounting substrate, electronic device, and electronic module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51134874A (en) * 1975-05-19 1976-11-22 Nippon Electric Co Method of manufacturing thick film multilayered wiring substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51134874A (en) * 1975-05-19 1976-11-22 Nippon Electric Co Method of manufacturing thick film multilayered wiring substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019079987A (en) * 2017-10-26 2019-05-23 京セラ株式会社 Electronic element mounting substrate, electronic device, and electronic module

Similar Documents

Publication Publication Date Title
JPS5892763U (en) Thick film multilayer substrate
JPS58120662U (en) Chippukiyariya
JPS6119285U (en) Thin film EL panel
JPS6037257U (en) photovoltaic element
JPS6076046U (en) semiconductor equipment
JPS6113891U (en) Thin film EL panel
JPS60102713U (en) Thin film magnetic head chip
JPS5853160U (en) Amorphous semiconductor device
JPS6094836U (en) semiconductor equipment
JPS6083258U (en) Resin-encapsulated semiconductor device
JPS6057133U (en) Wiring structure of semiconductor integrated circuit
JPS5881949U (en) integrated circuit board
JPS5948078U (en) Thin film hybrid integrated circuit
JPS6127302U (en) Tantalum thin film resistance wiring board
JPS59158393U (en) hybrid integrated circuit
JPS6142861U (en) semiconductor equipment
JPS60163698U (en) Electrode structure of EL element
JPS6122363U (en) Film composition of bonding pad
JPS59117101U (en) Glass-encapsulated electronic components
JPS60138747U (en) thermal head
JPS6127256U (en) wire bonding pad
JPS58159764U (en) magnetoelectric conversion element
JPS6012297U (en) thin film light emitting device
JPS6122365U (en) thin film capacitor
JPS59101428U (en) thick film capacitor