JPS6127256U - wire bonding pad - Google Patents

wire bonding pad

Info

Publication number
JPS6127256U
JPS6127256U JP10888184U JP10888184U JPS6127256U JP S6127256 U JPS6127256 U JP S6127256U JP 10888184 U JP10888184 U JP 10888184U JP 10888184 U JP10888184 U JP 10888184U JP S6127256 U JPS6127256 U JP S6127256U
Authority
JP
Japan
Prior art keywords
insulating film
bonding pad
wire bonding
metal wiring
patterning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10888184U
Other languages
Japanese (ja)
Inventor
寿一 岸田
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP10888184U priority Critical patent/JPS6127256U/en
Publication of JPS6127256U publication Critical patent/JPS6127256U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05005—Structure
    • H01L2224/05009—Bonding area integrally formed with a via connection of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H01L2224/05558—Shape in side view conformal layer on a patterned surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来例のワイヤボンディングパッドを示す断面
図、第２図は本考案の一実施例を示すワイヤボンデイン
グパッドの断面図である。 １・・・基板、２・・・アルミ配線、３・・・耐熱性樹
脂、４・・・接続用金属。FIG. 1 is a cross-sectional view of a conventional wire bonding pad, and FIG. 2 is a cross-sectional view of a wire bonding pad according to an embodiment of the present invention. 1... Board, 2... Aluminum wiring, 3... Heat resistant resin, 4... Connection metal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板上に形成された第１の金属配線のバターニング工程
と第１の金属配線の保護用絶縁膜の形成工程と、第１の
金属配線の接続部において絶縁膜の開口部のバターニン
グ工程と、絶縁膜を覆う第２の金属膜の形成工程と、絶
縁膜開口部を覆う第２の金属膜のパターンニング工程に
より形成され、絶縁膜開口部面積を第１の金属配線面積
より大に形成した構成を特徴とするワイヤボンディング
パツド。A step of patterning the first metal wiring formed on the substrate, a step of forming a protective insulating film for the first metal wiring, and a step of patterning the opening of the insulating film at the connection portion of the first metal wiring. , is formed by a step of forming a second metal film covering the insulating film and a step of patterning the second metal film covering the opening of the insulating film, and the area of the opening of the insulating film is made larger than the area of the first metal wiring. A wire bonding pad featuring a structure that
JP10888184U 1984-07-20 1984-07-20 wire bonding pad Pending JPS6127256U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10888184U JPS6127256U (en) 1984-07-20 1984-07-20 wire bonding pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10888184U JPS6127256U (en) 1984-07-20 1984-07-20 wire bonding pad

Publications (1)

Publication Number Publication Date
JPS6127256U true JPS6127256U (en) 1986-02-18

Family

ID=30668053

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10888184U Pending JPS6127256U (en) 1984-07-20 1984-07-20 wire bonding pad

Country Status (1)

Country Link
JP (1) JPS6127256U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02143622A (en) * 1988-11-25 1990-06-01 Canon Inc Information transmission system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02143622A (en) * 1988-11-25 1990-06-01 Canon Inc Information transmission system

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