JPS6142861U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6142861U
JPS6142861U JP1984126031U JP12603184U JPS6142861U JP S6142861 U JPS6142861 U JP S6142861U JP 1984126031 U JP1984126031 U JP 1984126031U JP 12603184 U JP12603184 U JP 12603184U JP S6142861 U JPS6142861 U JP S6142861U
Authority
JP
Japan
Prior art keywords
metal electrode
semiconductor equipment
oxide film
semiconductor device
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984126031U
Other languages
Japanese (ja)
Inventor
忠彦 田中
敏雄 若林
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP1984126031U priority Critical patent/JPS6142861U/en
Publication of JPS6142861U publication Critical patent/JPS6142861U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案を説明する断面図で、第2図は従来例を
説明する横面図である。 主な図番の説明、1は半導体チップ、3は金属電極、6
はチップ部品である。
FIG. 1 is a sectional view illustrating the present invention, and FIG. 2 is a lateral view illustrating a conventional example. Explanation of main figure numbers, 1 is semiconductor chip, 3 is metal electrode, 6
is a chip component.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板と該半導体基板に形成した回路素子と前記基
板表面を被覆する酸化膜と該酸化膜の一部に付着した金
属電極と該金属電極と前記回路束子とを接続する導体パ
ターンと前記金属電極に固着したチップ部品とを具備す
ることを特徴とす8半導体装置。
A semiconductor substrate, a circuit element formed on the semiconductor substrate, an oxide film covering the surface of the substrate, a metal electrode attached to a part of the oxide film, a conductor pattern connecting the metal electrode and the circuit bundler, and the metal electrode. 8. A semiconductor device comprising: a chip component fixed to the semiconductor device;
JP1984126031U 1984-08-20 1984-08-20 semiconductor equipment Pending JPS6142861U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984126031U JPS6142861U (en) 1984-08-20 1984-08-20 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984126031U JPS6142861U (en) 1984-08-20 1984-08-20 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6142861U true JPS6142861U (en) 1986-03-19

Family

ID=30684717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984126031U Pending JPS6142861U (en) 1984-08-20 1984-08-20 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6142861U (en)

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