JPS5948078U - Thin film hybrid integrated circuit - Google Patents
Thin film hybrid integrated circuitInfo
- Publication number
- JPS5948078U JPS5948078U JP14460682U JP14460682U JPS5948078U JP S5948078 U JPS5948078 U JP S5948078U JP 14460682 U JP14460682 U JP 14460682U JP 14460682 U JP14460682 U JP 14460682U JP S5948078 U JPS5948078 U JP S5948078U
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- integrated circuit
- hybrid integrated
- film hybrid
- layer formed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は薄膜混成集積回路に形成された多層配線の従来
構成を示す断面図、第２図は本考案の一実施例になる薄
膜混成集積回路の多層配線構成を示す断面図である。
なお図中において、１．１１は薄膜混成集積回路、２．
１２はアルミナ基板、もしくはグレーズドアルミナ基板
、３． ７． １３． １９はニクロム層、４． Ｂ、
１４． ２０は金層、５． ９． １５゜２１は導
体層、６，１６．１８は絶縁層（ポリイミド層）、１７
は金属層にクロム層）を示す。FIG. 1 is a sectional view showing a conventional structure of multilayer wiring formed in a thin film hybrid integrated circuit, and FIG. 2 is a sectional view showing a multilayer wiring structure of a thin film hybrid integrated circuit according to an embodiment of the present invention. In the figure, 1.11 is a thin film hybrid integrated circuit, 2.
12 is an alumina substrate or a glazed alumina substrate; 3. 7. 13. 19 is a nichrome layer; 4. B,
14. 20 is the gold layer; 5. 9. 15゜21 is a conductor layer, 6, 16.18 is an insulating layer (polyimide layer), 17
indicates a chromium layer on the metal layer).
Claims (1)
層が絶縁層を介して積層された多層配線を含む薄膜混成
集積回路において、前記第１の導体層と、その表面に形
成した第１の絶縁層と、その表面にニクロム等の金属で
形成した電食防止層と、その表面に形成した第２の絶縁
層と、その表面に形成した前記第２の導体層を含む多層
配線を含むことを特徴とした薄膜混成集積回路。In a thin film hybrid integrated circuit including a multilayer wiring in which first and second conductor layers each having a gold layer deposited on the surface of a nichrome layer are laminated with an insulating layer interposed therebetween, the first conductor layer and the second conductor layer formed on the surface thereof A multilayer comprising a first insulating layer formed on the surface thereof, an electrolytic corrosion prevention layer formed of a metal such as nichrome on the surface, a second insulating layer formed on the surface, and the second conductor layer formed on the surface. A thin film hybrid integrated circuit characterized by including wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14460682U JPS5948078U (en) | 1982-09-24 | 1982-09-24 | Thin film hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14460682U JPS5948078U (en) | 1982-09-24 | 1982-09-24 | Thin film hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5948078U true JPS5948078U (en) | 1984-03-30 |
Family
ID=30322423
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14460682U Pending JPS5948078U (en) | 1982-09-24 | 1982-09-24 | Thin film hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5948078U (en) |
-
1982
- 1982-09-24 JP JP14460682U patent/JPS5948078U/en active Pending
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