JPS5851521A - 半導体ウェハのダイシング方法 - Google Patents

半導体ウェハのダイシング方法

Info

Publication number
JPS5851521A
JPS5851521A JP56149438A JP14943881A JPS5851521A JP S5851521 A JPS5851521 A JP S5851521A JP 56149438 A JP56149438 A JP 56149438A JP 14943881 A JP14943881 A JP 14943881A JP S5851521 A JPS5851521 A JP S5851521A
Authority
JP
Japan
Prior art keywords
dicing
wafer
jig
notch
adhesive tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56149438A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0143459B2 (enrdf_load_stackoverflow
Inventor
Tsutomu Mimata
巳亦　力
Yoshiyuki Abe
由之 阿部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56149438A priority Critical patent/JPS5851521A/ja
Publication of JPS5851521A publication Critical patent/JPS5851521A/ja
Publication of JPH0143459B2 publication Critical patent/JPH0143459B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
JP56149438A 1981-09-24 1981-09-24 半導体ウェハのダイシング方法 Granted JPS5851521A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56149438A JPS5851521A (ja) 1981-09-24 1981-09-24 半導体ウェハのダイシング方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56149438A JPS5851521A (ja) 1981-09-24 1981-09-24 半導体ウェハのダイシング方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63107646A Division JPS63288714A (ja) 1988-05-02 1988-05-02 ダイシング治具

Publications (2)

Publication Number Publication Date
JPS5851521A true JPS5851521A (ja) 1983-03-26
JPH0143459B2 JPH0143459B2 (enrdf_load_stackoverflow) 1989-09-20

Family

ID=15475111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56149438A Granted JPS5851521A (ja) 1981-09-24 1981-09-24 半導体ウェハのダイシング方法

Country Status (1)

Country Link
JP (1) JPS5851521A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59179510A (ja) * 1983-03-29 1984-10-12 Toa Nenryo Kogyo Kk エチレン共重合体の製造法
JPS60136236A (ja) * 1983-12-23 1985-07-19 Toshiba Corp ウエフア保持治具
US5238876A (en) * 1989-07-21 1993-08-24 Mitsubishi Denki Kabushiki Kaisha Method of dividing semiconductor wafer using ultraviolet sensitive tape
EP1073098A1 (en) * 1999-07-28 2001-01-31 Infineon Technologies AG Low stress wafer mounting assembly and method
JP2015162582A (ja) * 2014-02-27 2015-09-07 株式会社東京精密 ダイシング装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3809050A (en) * 1971-01-13 1974-05-07 Cogar Corp Mounting block for semiconductor wafers
JPS5011764A (enrdf_load_stackoverflow) * 1973-06-04 1975-02-06
JPS5178691A (ja) * 1974-12-28 1976-07-08 Sony Corp Uehakyokyusochi
JPS54111757A (en) * 1978-02-22 1979-09-01 Hitachi Ltd Dicing method
JPS54134973A (en) * 1978-04-12 1979-10-19 Kyushu Nippon Electric Sheet holding jig for semiconductor wafer
JPS5636149U (enrdf_load_stackoverflow) * 1979-08-28 1981-04-07

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3809050A (en) * 1971-01-13 1974-05-07 Cogar Corp Mounting block for semiconductor wafers
JPS5011764A (enrdf_load_stackoverflow) * 1973-06-04 1975-02-06
JPS5178691A (ja) * 1974-12-28 1976-07-08 Sony Corp Uehakyokyusochi
JPS54111757A (en) * 1978-02-22 1979-09-01 Hitachi Ltd Dicing method
JPS54134973A (en) * 1978-04-12 1979-10-19 Kyushu Nippon Electric Sheet holding jig for semiconductor wafer
JPS5636149U (enrdf_load_stackoverflow) * 1979-08-28 1981-04-07

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59179510A (ja) * 1983-03-29 1984-10-12 Toa Nenryo Kogyo Kk エチレン共重合体の製造法
JPS60136236A (ja) * 1983-12-23 1985-07-19 Toshiba Corp ウエフア保持治具
US5238876A (en) * 1989-07-21 1993-08-24 Mitsubishi Denki Kabushiki Kaisha Method of dividing semiconductor wafer using ultraviolet sensitive tape
US5332406A (en) * 1989-07-21 1994-07-26 Mitsubishi Denki Kabushiki Kaisha Apparatus for producing semiconductor device
EP1073098A1 (en) * 1999-07-28 2001-01-31 Infineon Technologies AG Low stress wafer mounting assembly and method
WO2001008202A1 (en) * 1999-07-28 2001-02-01 Infineon Technologies Ag Low stress wafer mounting assembly and method
JP2015162582A (ja) * 2014-02-27 2015-09-07 株式会社東京精密 ダイシング装置

Also Published As

Publication number Publication date
JPH0143459B2 (enrdf_load_stackoverflow) 1989-09-20

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