JPS58197874A - 半導体装置およびその製法 - Google Patents

半導体装置およびその製法

Info

Publication number
JPS58197874A
JPS58197874A JP57080943A JP8094382A JPS58197874A JP S58197874 A JPS58197874 A JP S58197874A JP 57080943 A JP57080943 A JP 57080943A JP 8094382 A JP8094382 A JP 8094382A JP S58197874 A JPS58197874 A JP S58197874A
Authority
JP
Japan
Prior art keywords
fuse element
layer
aluminum
wiring
fuse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57080943A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0332230B2 (enExample
Inventor
Taiichi Inoue
井上　泰一
Ryoichi Takamatsu
良一 高松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57080943A priority Critical patent/JPS58197874A/ja
Publication of JPS58197874A publication Critical patent/JPS58197874A/ja
Publication of JPH0332230B2 publication Critical patent/JPH0332230B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W20/493—

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP57080943A 1982-05-14 1982-05-14 半導体装置およびその製法 Granted JPS58197874A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57080943A JPS58197874A (ja) 1982-05-14 1982-05-14 半導体装置およびその製法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57080943A JPS58197874A (ja) 1982-05-14 1982-05-14 半導体装置およびその製法

Publications (2)

Publication Number Publication Date
JPS58197874A true JPS58197874A (ja) 1983-11-17
JPH0332230B2 JPH0332230B2 (enExample) 1991-05-10

Family

ID=13732567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57080943A Granted JPS58197874A (ja) 1982-05-14 1982-05-14 半導体装置およびその製法

Country Status (1)

Country Link
JP (1) JPS58197874A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158660A (ja) * 1984-01-28 1985-08-20 Toshiba Corp 半導体メモリの製造方法
JPS6355955A (ja) * 1986-08-26 1988-03-10 Nec Corp 半導体装置
JPS63161641A (ja) * 1986-12-25 1988-07-05 Nec Corp 半導体記憶装置
JPH0249450A (ja) * 1988-03-18 1990-02-19 Digital Equip Corp <Dec> 集積回路を変更する方法
JP2004515061A (ja) * 2000-11-27 2004-05-20 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Ｍｏｓデバイスベースのセル構造を有するポリヒューズｒｏｍ、及びそれに対する読出しと書込みの方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS567467A (en) * 1979-07-02 1981-01-26 Nec Corp Semiconductor memory device
JPS5685846A (en) * 1979-12-14 1981-07-13 Fujitsu Ltd Semiconductor integrated circuit device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS567467A (en) * 1979-07-02 1981-01-26 Nec Corp Semiconductor memory device
JPS5685846A (en) * 1979-12-14 1981-07-13 Fujitsu Ltd Semiconductor integrated circuit device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158660A (ja) * 1984-01-28 1985-08-20 Toshiba Corp 半導体メモリの製造方法
JPS6355955A (ja) * 1986-08-26 1988-03-10 Nec Corp 半導体装置
JPS63161641A (ja) * 1986-12-25 1988-07-05 Nec Corp 半導体記憶装置
JPH0249450A (ja) * 1988-03-18 1990-02-19 Digital Equip Corp <Dec> 集積回路を変更する方法
JP2004515061A (ja) * 2000-11-27 2004-05-20 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ Ｍｏｓデバイスベースのセル構造を有するポリヒューズｒｏｍ、及びそれに対する読出しと書込みの方法

Also Published As

Publication number Publication date
JPH0332230B2 (enExample) 1991-05-10

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