JPS58135654A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58135654A
JPS58135654A JP57017558A JP1755882A JPS58135654A JP S58135654 A JPS58135654 A JP S58135654A JP 57017558 A JP57017558 A JP 57017558A JP 1755882 A JP1755882 A JP 1755882A JP S58135654 A JPS58135654 A JP S58135654A
Authority
JP
Japan
Prior art keywords
solder
metal electrode
film
semiconductor
electrode film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57017558A
Other languages
English (en)
Japanese (ja)
Other versions
JPS634940B2 (cg-RX-API-DMAC10.html
Inventor
Tadao Marushima
九嶋　忠雄
Masahiro Aida
合田　正広
Tasao Soga
太佐男 曽我
Toshitaka Yamamoto
敏孝 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57017558A priority Critical patent/JPS58135654A/ja
Priority to DE8383101135T priority patent/DE3379762D1/de
Priority to EP83101135A priority patent/EP0085974B1/en
Priority to US06/464,379 priority patent/US4503597A/en
Publication of JPS58135654A publication Critical patent/JPS58135654A/ja
Publication of JPS634940B2 publication Critical patent/JPS634940B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W72/012—
    • H10W72/251—

Landscapes

  • Die Bonding (AREA)
JP57017558A 1982-02-08 1982-02-08 半導体装置の製造方法 Granted JPS58135654A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57017558A JPS58135654A (ja) 1982-02-08 1982-02-08 半導体装置の製造方法
DE8383101135T DE3379762D1 (en) 1982-02-08 1983-02-07 Method of forming a number of solder portions on a semiconductor wafer
EP83101135A EP0085974B1 (en) 1982-02-08 1983-02-07 Method of forming a number of solder portions on a semiconductor wafer
US06/464,379 US4503597A (en) 1982-02-08 1983-02-07 Method of forming a number of solder layers on a semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57017558A JPS58135654A (ja) 1982-02-08 1982-02-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58135654A true JPS58135654A (ja) 1983-08-12
JPS634940B2 JPS634940B2 (cg-RX-API-DMAC10.html) 1988-02-01

Family

ID=11947237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57017558A Granted JPS58135654A (ja) 1982-02-08 1982-02-08 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US4503597A (cg-RX-API-DMAC10.html)
EP (1) EP0085974B1 (cg-RX-API-DMAC10.html)
JP (1) JPS58135654A (cg-RX-API-DMAC10.html)
DE (1) DE3379762D1 (cg-RX-API-DMAC10.html)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4545761A (en) * 1984-12-10 1985-10-08 At&T Technologies, Inc. Method and apparatus for securing articles in place on a substrate
US5096855A (en) * 1988-05-23 1992-03-17 U.S. Philips Corporation Method of dicing semiconductor wafers which produces shards less than 10 microns in size
US5003374A (en) * 1988-05-23 1991-03-26 North American Philips Corporation Semiconductor wafer
US4950623A (en) * 1988-08-02 1990-08-21 Microelectronics Center Of North Carolina Method of building solder bumps
US5018002A (en) * 1989-07-03 1991-05-21 General Electric Company High current hermetic package including an internal foil and having a lead extending through the package lid and a packaged semiconductor chip
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
US5567648A (en) * 1994-08-29 1996-10-22 Motorola, Inc. Process for providing interconnect bumps on a bonding pad by application of a sheet of conductive discs
US5796169A (en) * 1996-11-19 1998-08-18 International Business Machines Corporation Structurally reinforced ball grid array semiconductor package and systems
DE19707887C2 (de) * 1997-02-27 2002-07-11 Micronas Semiconductor Holding Verfahren zum Herstellen und Trennen von elektronischen Elementen mit leitfähigen Kontaktanschlüssen
US6472740B1 (en) * 2001-05-30 2002-10-29 International Business Machines Corporation Self-supporting air bridge interconnect structure for integrated circuits
DE10312109A1 (de) * 2003-03-19 2004-09-30 Robert Bosch Gmbh Herstellung von Lotkontakten auf einem Wafer unter Verwendung einer strukturierten Lotfolie

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3112388A (en) * 1958-03-24 1963-11-26 Avco Corp Brazing fixture
US3106014A (en) * 1959-02-18 1963-10-08 Continental Can Co Production of laminate composite material by roll bonding procedures
FR2359508A1 (fr) * 1976-07-19 1978-02-17 Silec Semi Conducteurs Nouvelle structure de diodes glassivees et son procede de fabrication
DE2656019C3 (de) * 1976-12-10 1980-07-17 Brown, Boveri & Cie Ag, 6800 Mannheim Vorrichtung zum Ausrichten und Anlöten von Podesten bzw. Ronden bezüglich der bzw. an den lötfähigen ohmschen Kontakten) von Halbleiterbauelementen
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees

Also Published As

Publication number Publication date
EP0085974A2 (en) 1983-08-17
JPS634940B2 (cg-RX-API-DMAC10.html) 1988-02-01
US4503597A (en) 1985-03-12
EP0085974B1 (en) 1989-04-26
DE3379762D1 (en) 1989-06-01
EP0085974A3 (en) 1985-12-27

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