JPS5789229A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5789229A JPS5789229A JP55164558A JP16455880A JPS5789229A JP S5789229 A JPS5789229 A JP S5789229A JP 55164558 A JP55164558 A JP 55164558A JP 16455880 A JP16455880 A JP 16455880A JP S5789229 A JPS5789229 A JP S5789229A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- buffer
- mounting plate
- circuit element
- face
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
Abstract
PURPOSE:To enble secure connection with little contact bonding force and create only even and little stress inside the element, in connecting a circuit element to a mounting plate in face-down bonding structure. CONSTITUTION:A mounting plate 2 consists of an Si-plate 6, a buffer 18 of polyimide resin painted on the main surface, and an Au-Si-eutectic layer 9. A wiring layer 8 made of a gold-plating layer is formed on the top of the buffer 18. A connection electrode 14 corresponds to an electrode to be connected 13 of a circuit element 1. In case of connecting the circuit element to the mounting plate 2 by face-down bonding method, the electrode 13 and the electrode 14 are connected by pressing the former to the latter at 290 deg.C. Thereupon, the buffer 18 is softened by heat, and the buffer itself sinks partially at reception of intensive force as necessary, even if the surface of the electrode 13 or the electrode 14 is inadequate in flatness or uneven in thickness.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55164558A JPS5789229A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55164558A JPS5789229A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5789229A true JPS5789229A (en) | 1982-06-03 |
Family
ID=15795439
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55164558A Pending JPS5789229A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5789229A (en) |
-
1980
- 1980-11-25 JP JP55164558A patent/JPS5789229A/en active Pending
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