JPS5788795A - Mutual connecting system for electronic circuit - Google Patents

Mutual connecting system for electronic circuit

Info

Publication number
JPS5788795A
JPS5788795A JP56151332A JP15133281A JPS5788795A JP S5788795 A JPS5788795 A JP S5788795A JP 56151332 A JP56151332 A JP 56151332A JP 15133281 A JP15133281 A JP 15133281A JP S5788795 A JPS5788795 A JP S5788795A
Authority
JP
Japan
Prior art keywords
substrate
glass
metal
devices
plates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56151332A
Other languages
English (en)
Other versions
JPH0214794B2 (ja
Inventor
Esu Supineri Toomasu
Geirii Manzu Uiriamu
Efu Ueirauku Donarudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPS5788795A publication Critical patent/JPS5788795A/ja
Publication of JPH0214794B2 publication Critical patent/JPH0214794B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4857—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0207—Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09054—Raised area or protrusion of metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0323—Working metal substrate or core, e.g. by etching, deforming
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
JP56151332A 1980-09-25 1981-09-24 Mutual connecting system for electronic circuit Granted JPS5788795A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/191,039 US4385202A (en) 1980-09-25 1980-09-25 Electronic circuit interconnection system

Publications (2)

Publication Number Publication Date
JPS5788795A true JPS5788795A (en) 1982-06-02
JPH0214794B2 JPH0214794B2 (ja) 1990-04-10

Family

ID=22703878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56151332A Granted JPS5788795A (en) 1980-09-25 1981-09-24 Mutual connecting system for electronic circuit

Country Status (4)

Country Link
US (1) US4385202A (ja)
EP (3) EP0240746B1 (ja)
JP (1) JPS5788795A (ja)
DE (1) DE3177304T2 (ja)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4570337A (en) * 1982-04-19 1986-02-18 Olin Corporation Method of assembling a chip carrier
US5014159A (en) * 1982-04-19 1991-05-07 Olin Corporation Semiconductor package
US4851615A (en) * 1982-04-19 1989-07-25 Olin Corporation Printed circuit board
US4866571A (en) * 1982-06-21 1989-09-12 Olin Corporation Semiconductor package
US4491622A (en) * 1982-04-19 1985-01-01 Olin Corporation Composites of glass-ceramic to metal seals and method of making the same
US4656499A (en) * 1982-08-05 1987-04-07 Olin Corporation Hermetically sealed semiconductor casing
US4827377A (en) * 1982-08-30 1989-05-02 Olin Corporation Multi-layer circuitry
US4682414A (en) * 1982-08-30 1987-07-28 Olin Corporation Multi-layer circuitry
US4862323A (en) * 1984-04-12 1989-08-29 Olin Corporation Chip carrier
US4853491A (en) * 1984-10-03 1989-08-01 Olin Corporation Chip carrier
US4712161A (en) * 1985-03-25 1987-12-08 Olin Corporation Hybrid and multi-layer circuitry
US4696851A (en) * 1985-03-25 1987-09-29 Olin Corporation Hybrid and multi-layer circuitry
DE3675321D1 (de) * 1985-08-16 1990-12-06 Dai Ichi Seiko Co Ltd Halbleiteranordnung mit packung vom steckerstifttyp.
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US4687540A (en) * 1985-12-20 1987-08-18 Olin Corporation Method of manufacturing glass capacitors and resulting product
US4725333A (en) * 1985-12-20 1988-02-16 Olin Corporation Metal-glass laminate and process for producing same
US4821151A (en) * 1985-12-20 1989-04-11 Olin Corporation Hermetically sealed package
US4739443A (en) * 1985-12-30 1988-04-19 Olin Corporation Thermally conductive module
US4711804A (en) * 1986-07-02 1987-12-08 General Electric Company Circuit board construction
US4797728A (en) * 1986-07-16 1989-01-10 General Electric Company Semiconductor device assembly and method of making same
US4820659A (en) * 1986-07-16 1989-04-11 General Electric Company Method of making a semiconductor device assembly
DE8709795U1 (ja) * 1987-07-16 1987-09-10 Zacherl, Manfred, 8250 Dorfen, De
US4859805A (en) * 1987-09-19 1989-08-22 Nippon Cmk Corp. Printed wiring board
US4849857A (en) * 1987-10-05 1989-07-18 Olin Corporation Heat dissipating interconnect tape for use in tape automated bonding
US4827376A (en) * 1987-10-05 1989-05-02 Olin Corporation Heat dissipating interconnect tape for use in tape automated bonding
US4843191A (en) * 1987-11-27 1989-06-27 American Telephone And Telegraph Company, At&T Bell Laboratories Interconnection technique using dielectric layers
US4999740A (en) * 1989-03-06 1991-03-12 Allied-Signal Inc. Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof
US5297007A (en) * 1990-09-19 1994-03-22 Rockwell International Corporation E/M shielded RF circuit board
US5156923A (en) * 1992-01-06 1992-10-20 Texas Instruments Incorporated Heat-transferring circuit substrate with limited thermal expansion and method for making
US5820014A (en) 1993-11-16 1998-10-13 Form Factor, Inc. Solder preforms
US5905300A (en) * 1994-03-31 1999-05-18 Vlsi Technology, Inc. Reinforced leadframe to substrate attachment
US5719749A (en) * 1994-09-26 1998-02-17 Sheldahl, Inc. Printed circuit assembly with fine pitch flexible printed circuit overlay mounted to printed circuit board
US5994152A (en) 1996-02-21 1999-11-30 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substrates
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure
US5888630A (en) * 1996-11-08 1999-03-30 W. L. Gore & Associates, Inc. Apparatus and method for unit area composition control to minimize warp in an integrated circuit chip package assembly
US5953210A (en) * 1997-07-08 1999-09-14 Hughes Electronics Corporation Reworkable circuit board assembly including a reworkable flip chip
JPH11354684A (ja) * 1998-06-09 1999-12-24 Nitto Denko Corp 低熱膨張配線基板および多層配線基板
JP3643743B2 (ja) * 2000-01-28 2005-04-27 三洋電機株式会社 実装基板
KR101768784B1 (ko) 2012-09-14 2017-08-16 쌩-고벵 글래스 프랑스 전기 접속 요소를 갖는 판유리
BR112015005078A2 (pt) 2012-09-14 2017-07-04 Saint Gobain chapa com elemento de conexão elétrica
HUE032460T2 (en) * 2012-11-21 2017-09-28 Saint Gobain Table with electrical connector and connecting rib
US9603236B2 (en) * 2014-08-18 2017-03-21 Samsung Electro-Mechanics Co., Ltd. Heat dissipating substrate
JP2019140226A (ja) * 2018-02-09 2019-08-22 富士通株式会社 回路基板、回路基板の製造方法及び電子装置
US20220208701A1 (en) * 2020-12-31 2022-06-30 Texas Instruments Incorporated Printed package and method of making the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5344872A (en) * 1976-10-04 1978-04-22 Tokyo Shibaura Electric Co Electric device substrate
JPS5344867A (en) * 1976-10-04 1978-04-22 Tokyo Shibaura Electric Co Electric device substrate

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3351816A (en) * 1965-02-04 1967-11-07 Bunker Ramo Planar coaxial circuitry
FR1540051A (fr) * 1966-09-21 1968-09-20 Rca Corp Microcircuit et son procédé de fabrication
US3499219A (en) * 1967-11-06 1970-03-10 Bunker Ramo Interconnection means and method of fabrication thereof
US3684464A (en) * 1970-11-04 1972-08-15 Texas Instruments Inc Composite metal laminate material and lead frame
GB1400394A (en) * 1971-07-14 1975-07-16 Lucas Industries Ltd Method of producing electric wiring arrangement
JPS5146904B2 (ja) * 1971-09-30 1976-12-11
US3767370A (en) * 1971-11-22 1973-10-23 Texas Instruments Inc Composite thermostat material
US3786172A (en) * 1972-12-07 1974-01-15 Accra Point Arrays Corp Printed circuit board method and apparatus
JPS5236675B2 (ja) * 1973-01-25 1977-09-17
US3921285A (en) * 1974-07-15 1975-11-25 Ibm Method for joining microminiature components to a carrying structure
US3952231A (en) * 1974-09-06 1976-04-20 International Business Machines Corporation Functional package for complex electronic systems with polymer-metal laminates and thermal transposer
FR2305025A1 (fr) * 1975-03-21 1976-10-15 Thomson Csf Element de liaison reliant un dispositif semi-conducteur a son support et dispositif comportant un tel element
US4025997A (en) * 1975-12-23 1977-05-31 International Telephone & Telegraph Corporation Ceramic mounting and heat sink device
JPS5382170A (en) * 1976-12-28 1978-07-20 Ngk Insulators Ltd Method of producing coupled type ic ceramic package
US4190474A (en) * 1977-12-22 1980-02-26 Gould Inc. Method of making a printed circuit board having mutually etchable copper and nickel layers
US4301324A (en) * 1978-02-06 1981-11-17 International Business Machines Corporation Glass-ceramic structures and sintered multilayer substrates thereof with circuit patterns of gold, silver or copper
JPS5550646A (en) * 1978-10-06 1980-04-12 Hitachi Ltd Integrated circuit device
DE2853951A1 (de) * 1978-12-14 1980-07-03 Demetron Kontaktplatte fuer halbleiter-bauelemente
US4295183A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Thin film metal package for LSI chips
US4256796A (en) * 1979-11-05 1981-03-17 Rca Corporation Partially devitrified porcelain composition and articles prepared with same
JPS5678146A (en) * 1980-10-20 1981-06-26 Hitachi Ltd Semiconductor device
JPS5815241A (ja) * 1981-07-20 1983-01-28 Sumitomo Electric Ind Ltd 半導体装置用基板

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5344872A (en) * 1976-10-04 1978-04-22 Tokyo Shibaura Electric Co Electric device substrate
JPS5344867A (en) * 1976-10-04 1978-04-22 Tokyo Shibaura Electric Co Electric device substrate

Also Published As

Publication number Publication date
EP0240746A3 (en) 1988-01-27
US4385202A (en) 1983-05-24
EP0210380A1 (en) 1987-02-04
EP0240746B1 (en) 1993-12-15
DE3177304D1 (de) 1994-01-27
EP0240746A2 (en) 1987-10-14
JPH0214794B2 (ja) 1990-04-10
DE3177304T2 (de) 1994-03-31
EP0052920B1 (en) 1988-05-18
EP0052920A3 (en) 1984-04-25
EP0052920A2 (en) 1982-06-02

Similar Documents

Publication Publication Date Title
JPS5788795A (en) Mutual connecting system for electronic circuit
US4472762A (en) Electronic circuit interconnection system
EP0064854B1 (en) Component assembly including a rigid substrate
KR960013632B1 (ko) 다중칩 집적회로 패키징 구성 및 방법
Scrantom et al. LTCC technology: where we are and where we're going. II
US6219253B1 (en) Molded electronic package, method of preparation using build up technology and method of shielding
US5463191A (en) Circuit board having an improved fine pitch ball grid array and method of assembly therefor
US5198693A (en) Aperture formation in aluminum circuit card for enhanced thermal dissipation
US6711812B1 (en) Method of making metal core substrate printed circuit wiring board enabling thermally enhanced ball grid array (BGA) packages
US4546406A (en) Electronic circuit interconnection system
KR100257926B1 (ko) 회로기판형성용다층필름 및 이를 사용한 다층회로기판 및 반도체장치용패키지
GB2204184A (en) Mounting electronic components on substrates
JPH08186376A (ja) 高密度薄膜多層配線基板並びにその実装構造体及びその製造方法
US5763060A (en) Printed wiring board
JPS63314858A (ja) 表面実装部品用パッケ−ジ
JPH0982835A (ja) 回路基板および多層回路基板
JPS60100496A (ja) プリント配線板
JP3868557B2 (ja) Ｉｃ搭載用多層プリント配線板の製造方法
JPH04133394A (ja) 多層プリント配線板
US7827679B1 (en) Thermal management circuit board and methods of producing the same
JPH10178122A (ja) Ｉｃ搭載用多層プリント配線板
JPH04280655A (ja) 高密度混載回路基板
Bingham et al. Multilayer Interconnection Techniques Applied to High Speed Computer Systems
JPS61276398A (ja) 多層回路基板
JPH0239460A (ja) 電子部品搭載用基板