JPS573148A - Diagnostic system for other system - Google Patents

Diagnostic system for other system

Info

Publication number
JPS573148A
JPS573148A JP7564180A JP7564180A JPS573148A JP S573148 A JPS573148 A JP S573148A JP 7564180 A JP7564180 A JP 7564180A JP 7564180 A JP7564180 A JP 7564180A JP S573148 A JPS573148 A JP S573148A
Authority
JP
Japan
Prior art keywords
shared memory
cpus
stored
calculation results
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7564180A
Other languages
English (en)
Inventor
Yoshio Watanabe
Setsuo Minamide
Yutaka Kubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7564180A priority Critical patent/JPS573148A/ja
Publication of JPS573148A publication Critical patent/JPS573148A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
JP7564180A 1980-06-06 1980-06-06 Diagnostic system for other system Pending JPS573148A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7564180A JPS573148A (en) 1980-06-06 1980-06-06 Diagnostic system for other system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7564180A JPS573148A (en) 1980-06-06 1980-06-06 Diagnostic system for other system

Publications (1)

Publication Number Publication Date
JPS573148A true JPS573148A (en) 1982-01-08

Family

ID=13582068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7564180A Pending JPS573148A (en) 1980-06-06 1980-06-06 Diagnostic system for other system

Country Status (1)

Country Link
JP (1) JPS573148A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0375837A (ja) * 1989-08-17 1991-03-29 Yokogawa Electric Corp 二重化制御システム
JPH0713789A (ja) * 1988-12-09 1995-01-17 Tandem Comput Inc フォールトトレラントコンピュータにおけるメモリ管理システム
US6334194B1 (en) 1997-11-07 2001-12-25 Nec Corporation Fault tolerant computer employing double-redundant structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0713789A (ja) * 1988-12-09 1995-01-17 Tandem Comput Inc フォールトトレラントコンピュータにおけるメモリ管理システム
JPH0375837A (ja) * 1989-08-17 1991-03-29 Yokogawa Electric Corp 二重化制御システム
US6334194B1 (en) 1997-11-07 2001-12-25 Nec Corporation Fault tolerant computer employing double-redundant structure

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