GB1444513A - Control method using computers operating in parallel - Google Patents

Control method using computers operating in parallel

Info

Publication number
GB1444513A
GB1444513A GB285274A GB285274A GB1444513A GB 1444513 A GB1444513 A GB 1444513A GB 285274 A GB285274 A GB 285274A GB 285274 A GB285274 A GB 285274A GB 1444513 A GB1444513 A GB 1444513A
Authority
GB
United Kingdom
Prior art keywords
output
computer
computers
reg
match
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB285274A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of GB1444513A publication Critical patent/GB1444513A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B61—RAILWAYS
    • B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L27/00—Central railway traffic control systems; Trackside control; Communication systems specially adapted therefor
    • B61L27/30—Trackside multiple control systems, e.g. switch-over between different systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/182—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits based on mutual exchange of the output between redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L2200/00—Type of vehicles
    • B60L2200/26—Rail vehicles

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Control By Computers (AREA)

Abstract

1444513 Data processing system INTERNATIONAL STANDARD ELECTRIC CORP 22 Jan 1974 [26 Jan 1973] 02852/74 Heading G4A A data processing system used, e.g. to control a railway signalling system, comprises at least two redundant computers and, in normal operation, is arranged such that an output from a second one of the computers is fed to a first one of the computers for comparison therein with the output developed by that computer, if the comparison produced agreement the output is read into an output register from where it is read to the second or in the case where there are three computers, the third computer for comparison therein with the output of that computer, and if the comparison produces agreement the contents of the output register are gated as an output of the system. As described three computers R1, R2, and R3 normally operate in a triple redundant fashion and are assigned the functions of an output computer R1, a comparator computer R2, and a read back/check computer R3, any of the computers being able to perform any of the functions. Output computer R1 receives an output T2 from comparator computer R2 and compares it with its own output T1. If the outputs match the comparator computer output T2 is fed to output register A-Reg. If the outputs do not match R1 compares the output of R3, i.e. T3, with T2 and T1. If T2 and T3 or T1 and T3 match, T3 is fed to output register A-Reg, T1 or T2 being declared "erroneous" as appropriate. If none of the outputs match an alarm and interrupt are generated. Assuming T2 has been fed to A-Reg the contents of A-Reg are fed to read back/check computer T3 where they are compared with T3. If the comparison produces a match computer R1 is signalled and R1 enables the transmission of the contents of A-Reg, i.e. T2, to the system output. If the comparison does not produce a match R3 compares the contents of A-Reg with the outputs of R1 and R2, i.e. T1 and T2, received over lines L13 and L23. If the comparison produces a match R3 declares itself "erroneous" and enables the transmission of the contents of A-Reg to the system output. If the comparison does not produce a match R3 compares T1, T2, and T3 and if they all agree writes the result into -A Reg and repeats the read back check. Operation with only two computers, one performing the functions of the comparator and read back/check computers and the other that of the output computer, is described for when one computer continually differs from the other two, this computer being disconnected. It is stated that each output word from each computer may consist of like ordered bits from a plurality of control words, the control words being accumulated in appropriate controlled devices. The computers are arranged periodically to exchange and compare test data to determine if any are faulty. The computer outputs may be coded for error detection.
GB285274A 1973-01-26 1974-01-22 Control method using computers operating in parallel Expired GB1444513A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2303828A DE2303828A1 (en) 1973-01-26 1973-01-26 CONTROL PROCEDURE WITH THREE COMPUTERS OPERATING IN PARALLEL

Publications (1)

Publication Number Publication Date
GB1444513A true GB1444513A (en) 1976-08-04

Family

ID=5870051

Family Applications (1)

Application Number Title Priority Date Filing Date
GB285274A Expired GB1444513A (en) 1973-01-26 1974-01-22 Control method using computers operating in parallel

Country Status (8)

Country Link
JP (1) JPS49110248A (en)
BE (1) BE810210R (en)
CH (1) CH591119A5 (en)
DE (1) DE2303828A1 (en)
ES (1) ES422629A1 (en)
GB (1) GB1444513A (en)
IT (1) IT1014538B (en)
NL (1) NL7401015A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251873A (en) * 1978-04-14 1981-02-17 Lucas Industries Limited Digital computing apparatus particularly for controlling a gas turbine engine
GB2265737A (en) * 1992-03-18 1993-10-06 Marconi Gec Ltd Distributed processor arrangement
EP0596516A2 (en) * 1992-11-06 1994-05-11 Nec Corporation Fault tolerant computer system comprising a fault detector in each processor module

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3009355C2 (en) * 1980-03-12 1984-08-30 Standard Elektrik Lorenz Ag, 7000 Stuttgart Redundant computing system
DE3108871A1 (en) * 1981-03-09 1982-09-16 Siemens AG, 1000 Berlin und 8000 München DEVICE FOR FUNCTIONAL TESTING OF A MULTIPLE COMPUTER SYSTEM
ZA825823B (en) * 1981-08-20 1983-07-27 Westinghouse Brake & Signal Combining replicated sub-system outputs
IN160140B (en) * 1981-10-10 1987-06-27 Westinghouse Brake & Signal
DE3310975A1 (en) * 1983-03-25 1984-09-27 Siemens AG, 1000 Berlin und 8000 München DEVICE FOR SAFE PROCESS CONTROL
US5428769A (en) * 1992-03-31 1995-06-27 The Dow Chemical Company Process control interface system having triply redundant remote field units
DE102005023296B4 (en) * 2005-05-12 2007-07-12 Siemens Ag Train Control System
ITGE20110034A1 (en) * 2011-03-31 2012-10-01 Automazione E Sicurezza Ferroviaria S R L SAFETY REPRESENTATION SYSTEM OF THE STATE OF EQUIPMENT OF A RAILWAY SIGNAL SYSTEM

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251873A (en) * 1978-04-14 1981-02-17 Lucas Industries Limited Digital computing apparatus particularly for controlling a gas turbine engine
GB2265737A (en) * 1992-03-18 1993-10-06 Marconi Gec Ltd Distributed processor arrangement
GB2265737B (en) * 1992-03-18 1995-07-12 Marconi Gec Ltd Distributed processor arrangement
EP0596516A2 (en) * 1992-11-06 1994-05-11 Nec Corporation Fault tolerant computer system comprising a fault detector in each processor module
EP0596516A3 (en) * 1992-11-06 1994-09-14 Nec Corp Fault tolerant computer system comprising a fault detector in each processor module.

Also Published As

Publication number Publication date
JPS49110248A (en) 1974-10-21
DE2303828A1 (en) 1974-08-01
ES422629A1 (en) 1976-05-01
BE810210R (en) 1974-07-29
CH591119A5 (en) 1977-09-15
NL7401015A (en) 1974-07-30
IT1014538B (en) 1977-04-30

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee