JPS5715298A - Storage protection system for common memory - Google Patents

Storage protection system for common memory

Info

Publication number
JPS5715298A
JPS5715298A JP9037380A JP9037380A JPS5715298A JP S5715298 A JPS5715298 A JP S5715298A JP 9037380 A JP9037380 A JP 9037380A JP 9037380 A JP9037380 A JP 9037380A JP S5715298 A JPS5715298 A JP S5715298A
Authority
JP
Japan
Prior art keywords
common
discriminating circuit
cpus
area
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9037380A
Other languages
Japanese (ja)
Other versions
JPS6057091B2 (en
Inventor
Teruaki Takegawa
Akihiko Suzuki
Kenichi Naka
Joichi Futaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP55090373A priority Critical patent/JPS6057091B2/en
Publication of JPS5715298A publication Critical patent/JPS5715298A/en
Publication of JPS6057091B2 publication Critical patent/JPS6057091B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To prevent data in a common memory from being destroyed owing to a runaway of a program, a fault of a CPU, etc., by providing a status discriminating circuit, a protection discriminating circuit, etc. CONSTITUTION:A boundary setting register 15 indicating boundaries between special area 17-19 and a common area 20 in common memories 6 and 7, a protection register 14 indicating whether access to the respective special areas and the common area is enabled or not, a status discriminating circuit 13 which compares statuses of CPUs 1-3 with those of the common memories 6 and 7, and a protection discriminating circuit 16 which discriminates whether access from the CPUs 1-3 is enabled on the basis of the outputs of the registers 15 and 14, and circuit 13 are provided. Access from the CPUs 1-3 to the common memories 6 and 7, only when the last statuses coincide and it is access to previously indicated area, is permitted.
JP55090373A 1980-07-02 1980-07-02 Common memory storage protection method Expired JPS6057091B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55090373A JPS6057091B2 (en) 1980-07-02 1980-07-02 Common memory storage protection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55090373A JPS6057091B2 (en) 1980-07-02 1980-07-02 Common memory storage protection method

Publications (2)

Publication Number Publication Date
JPS5715298A true JPS5715298A (en) 1982-01-26
JPS6057091B2 JPS6057091B2 (en) 1985-12-13

Family

ID=13996753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55090373A Expired JPS6057091B2 (en) 1980-07-02 1980-07-02 Common memory storage protection method

Country Status (1)

Country Link
JP (1) JPS6057091B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914062A (en) * 1982-07-15 1984-01-24 Hitachi Ltd Method for controlling duplicated shared memory
JPS601995A (en) * 1983-06-17 1985-01-08 Hitachi Ltd Control system of microprocessor
JPH047764A (en) * 1990-04-26 1992-01-13 Matsushita Electric Ind Co Ltd Multiprocessor device
JP2020087413A (en) * 2018-11-30 2020-06-04 エスケーハイニックス株式会社ＳＫ ｈｙｎｉｘ Ｉｎｃ． Memory system
JP2022548641A (en) * 2019-09-17 2022-11-21 マイクロン テクノロジー，インク． Memory chips that connect system-on-chips and accelerator chips

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914062A (en) * 1982-07-15 1984-01-24 Hitachi Ltd Method for controlling duplicated shared memory
JPH041374B2 (en) * 1982-07-15 1992-01-10 Hitachi Ltd
JPS601995A (en) * 1983-06-17 1985-01-08 Hitachi Ltd Control system of microprocessor
JPH0534877B2 (en) * 1983-06-17 1993-05-25 Hitachi Ltd
JPH047764A (en) * 1990-04-26 1992-01-13 Matsushita Electric Ind Co Ltd Multiprocessor device
JP2020087413A (en) * 2018-11-30 2020-06-04 エスケーハイニックス株式会社ＳＫ ｈｙｎｉｘ Ｉｎｃ． Memory system
JP2022548641A (en) * 2019-09-17 2022-11-21 マイクロン テクノロジー，インク． Memory chips that connect system-on-chips and accelerator chips

Also Published As

Publication number Publication date
JPS6057091B2 (en) 1985-12-13

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