JPS5211846A - Multiprocessor control unit - Google Patents
Multiprocessor control unitInfo
- Publication number
- JPS5211846A JPS5211846A JP50087316A JP8731675A JPS5211846A JP S5211846 A JPS5211846 A JP S5211846A JP 50087316 A JP50087316 A JP 50087316A JP 8731675 A JP8731675 A JP 8731675A JP S5211846 A JPS5211846 A JP S5211846A
- Authority
- JP
- Japan
- Prior art keywords
- control unit
- multiprocessor control
- multiprocessor
- banks
- bank
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Multi Processors (AREA)
Abstract
PURPOSE: Prevention of the collision of MS requests from more than one CPU sharing the main storage (MS) at the MS bank, and enabling the simultaneous operation of all the banks in the multiprocessor system.
COPYRIGHT: (C)1977,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50087316A JPS5813933B2 (en) | 1975-07-18 | 1975-07-18 | multiprocessor control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50087316A JPS5813933B2 (en) | 1975-07-18 | 1975-07-18 | multiprocessor control device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5211846A true JPS5211846A (en) | 1977-01-29 |
JPS5813933B2 JPS5813933B2 (en) | 1983-03-16 |
Family
ID=13911424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50087316A Expired JPS5813933B2 (en) | 1975-07-18 | 1975-07-18 | multiprocessor control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5813933B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01179531A (en) * | 1988-01-08 | 1989-07-17 | Esuto:Kk | Receiver for specific object group broadcast |
-
1975
- 1975-07-18 JP JP50087316A patent/JPS5813933B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01179531A (en) * | 1988-01-08 | 1989-07-17 | Esuto:Kk | Receiver for specific object group broadcast |
Also Published As
Publication number | Publication date |
---|---|
JPS5813933B2 (en) | 1983-03-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5242334A (en) | Computer | |
JPS5220735A (en) | Microprogram controlled computer system | |
JPS5211846A (en) | Multiprocessor control unit | |
JPS51135441A (en) | Load control unit | |
JPS52103925A (en) | Random access memory unit | |
JPS539434A (en) | Data processor system | |
JPS52139333A (en) | Data input system for cash register | |
JPS5274240A (en) | Lsi data processing system | |
JPS526032A (en) | Main storage control unit | |
JPS5267933A (en) | Preference control system for multi-processor system | |
JPS51118335A (en) | Partly writing system | |
JPS5211729A (en) | Information processing unit | |
JPS5268331A (en) | Interleaving control system of shared memory | |
JPS52129241A (en) | Memory control system | |
JPS5353929A (en) | Memory system | |
JPS53134334A (en) | Prefetch system in information processor having buffer memory | |
JPS5235948A (en) | Information processing unit for imaginary memory system | |
JPS5216137A (en) | Main memory access control system | |
JPS5437644A (en) | Information processing system | |
JPS5390832A (en) | Microorder bus time-division controller | |
JPS52112237A (en) | Memory control unit | |
JPS51124335A (en) | Memory control device in multiprocessor configuration | |
JPS53116041A (en) | System controller | |
JPS53148343A (en) | Post store control system | |
JPS5267934A (en) | Control system for multi-processor system |