JPS57143644A - Microprogram control device - Google Patents

Microprogram control device

Info

Publication number
JPS57143644A
JPS57143644A JP56030289A JP3028981A JPS57143644A JP S57143644 A JPS57143644 A JP S57143644A JP 56030289 A JP56030289 A JP 56030289A JP 3028981 A JP3028981 A JP 3028981A JP S57143644 A JPS57143644 A JP S57143644A
Authority
JP
Japan
Prior art keywords
mupg
output signal
execution
microprogram
comparison
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56030289A
Other languages
Japanese (ja)
Inventor
Koichi Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56030289A priority Critical patent/JPS57143644A/en
Publication of JPS57143644A publication Critical patent/JPS57143644A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/28Error detection; Error correction; Monitoring by checking the correct order of processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To facilitate the trouble-shoot for abnormality of the device, by providing a function for detecting a wrong execution of the microprogram sequence and a function for stopping the microprogram for the detection of the wrong execution. CONSTITUTION:A microprogram muPG is stored in a control memory CS, and a micro instruction read from the memory CS is stored in a read register CSR. An output signal 51 for a bit deciding whether executions permitted or not from the CSR and an output signal 52 from a run permitting indicator IND are compared with each other by a comparing circuit CMP. If the comparison results in disaccord, a comparison output signal 56 becomes logical 1, and the signal 56 is sent to gates A and B as a muPG ineffective condition signal 53 through a gate circuit GATEC to suppress the execution of the micro instruction word. Simultaneously, the sequence control of the muPG is stopped by a sequence control circuit FWC, and the output signal of an oscillating circuit OSC is suppressed, and clocks are stopped. If the comparison in the CNP results in coincidence, the execution of the muPG is permitted.
JP56030289A 1981-03-03 1981-03-03 Microprogram control device Pending JPS57143644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56030289A JPS57143644A (en) 1981-03-03 1981-03-03 Microprogram control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56030289A JPS57143644A (en) 1981-03-03 1981-03-03 Microprogram control device

Publications (1)

Publication Number Publication Date
JPS57143644A true JPS57143644A (en) 1982-09-04

Family

ID=12299557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56030289A Pending JPS57143644A (en) 1981-03-03 1981-03-03 Microprogram control device

Country Status (1)

Country Link
JP (1) JPS57143644A (en)

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