JPS56152056A - Pseudo fault generator - Google Patents

Pseudo fault generator

Info

Publication number
JPS56152056A
JPS56152056A JP5457680A JP5457680A JPS56152056A JP S56152056 A JPS56152056 A JP S56152056A JP 5457680 A JP5457680 A JP 5457680A JP 5457680 A JP5457680 A JP 5457680A JP S56152056 A JPS56152056 A JP S56152056A
Authority
JP
Japan
Prior art keywords
address
fault
generated
dfr11
tar3
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5457680A
Other languages
Japanese (ja)
Inventor
Katsuhiko Kiyoo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5457680A priority Critical patent/JPS56152056A/en
Publication of JPS56152056A publication Critical patent/JPS56152056A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To vary the timing of fault detection freely by generating a specific fault artificially when an assigned address for reading a micro (mu) instruction reaches preset one. CONSTITUTION:The address of a (mu) instruction generating a pseudo fault is inputted to assigned-address register TAR3 by program PG, and a code expressing the kind of the fault to be generated is also inputted to register DFR11 which indicates in which part of a data processor a pseudo fault should be generated. The address is increased by one address with control storage 1 to read and execute (mu) instructions and when the coincidence between the contents of control storage address register CAR2 and those of TAR3 is found by address coincidence circuit 4, the output signal of circuit 4 sets FF8 via gates 5 and 7 to make decoder 12 effective. The code of DFR11 is decoded by decoder 12 and with this signal, the prescribed pseudo fault is generated. According to contents of TAR3 and DFR11, the pseudo fault is generated at optional timing.
JP5457680A 1980-04-24 1980-04-24 Pseudo fault generator Pending JPS56152056A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5457680A JPS56152056A (en) 1980-04-24 1980-04-24 Pseudo fault generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5457680A JPS56152056A (en) 1980-04-24 1980-04-24 Pseudo fault generator

Publications (1)

Publication Number Publication Date
JPS56152056A true JPS56152056A (en) 1981-11-25

Family

ID=12974517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5457680A Pending JPS56152056A (en) 1980-04-24 1980-04-24 Pseudo fault generator

Country Status (1)

Country Link
JP (1) JPS56152056A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017542A (en) * 1983-07-08 1985-01-29 Japanese National Railways<Jnr> Fault injection device
JPS60100233A (en) * 1983-11-04 1985-06-04 Nec Corp Artificial fault generator
JPS60116031A (en) * 1983-11-04 1985-06-22 モトロ−ラ・インコ−ポレ−テツド Output comparison system for data processor and method thereof
JPH01231134A (en) * 1988-03-11 1989-09-14 Nec Corp Artificial fault generating system for information processor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4955247A (en) * 1972-09-29 1974-05-29
JPS51138359A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Data processing apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4955247A (en) * 1972-09-29 1974-05-29
JPS51138359A (en) * 1975-05-26 1976-11-29 Hitachi Ltd Data processing apparatus

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6017542A (en) * 1983-07-08 1985-01-29 Japanese National Railways<Jnr> Fault injection device
JPS60100233A (en) * 1983-11-04 1985-06-04 Nec Corp Artificial fault generator
JPS60116031A (en) * 1983-11-04 1985-06-22 モトロ−ラ・インコ−ポレ−テツド Output comparison system for data processor and method thereof
JPH0578044B2 (en) * 1983-11-04 1993-10-28 Motorola Inc
JPH01231134A (en) * 1988-03-11 1989-09-14 Nec Corp Artificial fault generating system for information processor

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