JPS5731078A - Vector data processor - Google Patents

Vector data processor

Info

Publication number
JPS5731078A
JPS5731078A JP10556080A JP10556080A JPS5731078A JP S5731078 A JPS5731078 A JP S5731078A JP 10556080 A JP10556080 A JP 10556080A JP 10556080 A JP10556080 A JP 10556080A JP S5731078 A JPS5731078 A JP S5731078A
Authority
JP
Japan
Prior art keywords
register
read
mask
designated
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10556080A
Other languages
Japanese (ja)
Inventor
Hiroshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10556080A priority Critical patent/JPS5731078A/en
Publication of JPS5731078A publication Critical patent/JPS5731078A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To omit read/write of unnecessary element data and to improve processing efficiency by reading previously a mask register and by detecting nonfulfilment about elememts of ones interleaved. CONSTITUTION:Element data read from a vector register designated in an operand part of an instruction are stored successively in a read register 2, and it is then, after being delayed by a buffer register 4 by one-time slot, added to an arithmetic pipeline 5. Further, element data that are designated and read out in an next operand part are successively set in a read register 3 and are inputted into the line 5. An arithmetic result outputted from said pipeline is set in a write register 1, further is written in a vector register designated in the operand part of the instruction. Further, a mask element read from an operand register designated in the mask operand part of the instruction is read out and is set in a register 6, further the output is inputted into the line 5, thereby determining execution of an operation by the logic of the mask element.
JP10556080A 1980-07-31 1980-07-31 Vector data processor Pending JPS5731078A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10556080A JPS5731078A (en) 1980-07-31 1980-07-31 Vector data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10556080A JPS5731078A (en) 1980-07-31 1980-07-31 Vector data processor

Publications (1)

Publication Number Publication Date
JPS5731078A true JPS5731078A (en) 1982-02-19

Family

ID=14410922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10556080A Pending JPS5731078A (en) 1980-07-31 1980-07-31 Vector data processor

Country Status (1)

Country Link
JP (1) JPS5731078A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167696A (en) * 1983-03-11 1984-09-21 Matsushita Electric Ind Co Ltd Heat exchanger
EP0131284A2 (en) * 1983-07-08 1985-01-16 Hitachi, Ltd. Storage control apparatus
JPS6059468A (en) * 1983-09-09 1985-04-05 Nec Corp Vector data processor
JPS61251960A (en) * 1985-03-29 1986-11-08 Nec Corp Vector instruction processor
JPH01309177A (en) * 1988-06-08 1989-12-13 Hitachi Ltd Information processor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59167696A (en) * 1983-03-11 1984-09-21 Matsushita Electric Ind Co Ltd Heat exchanger
EP0131284A2 (en) * 1983-07-08 1985-01-16 Hitachi, Ltd. Storage control apparatus
JPS6059468A (en) * 1983-09-09 1985-04-05 Nec Corp Vector data processor
JPS61251960A (en) * 1985-03-29 1986-11-08 Nec Corp Vector instruction processor
JPH01309177A (en) * 1988-06-08 1989-12-13 Hitachi Ltd Information processor

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