JPS57100692A - Control circuit for control storage writing retrying - Google Patents
Control circuit for control storage writing retryingInfo
- Publication number
- JPS57100692A JPS57100692A JP17655180A JP17655180A JPS57100692A JP S57100692 A JPS57100692 A JP S57100692A JP 17655180 A JP17655180 A JP 17655180A JP 17655180 A JP17655180 A JP 17655180A JP S57100692 A JPS57100692 A JP S57100692A
- Authority
- JP
- Japan
- Prior art keywords
- logic
- retrying
- writing
- output
- microprogram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/24—Loading of the microprogram
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To discriminate whether retrying is possible or not, through relatively small scale hardware by making a comparison between the addresses of banks to which microprograms being executed and at a writing destination belong respectively. CONSTITUTION:The bank address of an execution microprogram in an execution-instruction address register 31 and that of a writing-destination microprogram in a writing-destination address register 32 are compared mutually by a comparing circuit 33, which when the both are coincident, generates a logic-1 output. When a writing timing signal WCS is supplied to an AND gate 34, the logic 1 is inputted to a j-kFF35 through the gate 34 and the FF35 has a logic-1 output. If the output of the FF35 has the logic 1 when an error occurs, retrying is made to be impossible and the processing of recovering the execution microprogram is performed by using an external device. When the output of the FF35 has logic 0, on the other hand, the retrying as to control storage 36 is enabled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17655180A JPS57100692A (en) | 1980-12-16 | 1980-12-16 | Control circuit for control storage writing retrying |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17655180A JPS57100692A (en) | 1980-12-16 | 1980-12-16 | Control circuit for control storage writing retrying |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57100692A true JPS57100692A (en) | 1982-06-22 |
Family
ID=16015555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17655180A Pending JPS57100692A (en) | 1980-12-16 | 1980-12-16 | Control circuit for control storage writing retrying |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57100692A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9651179B2 (en) | 2012-05-02 | 2017-05-16 | Norma Germany Gmbh | Profile clamp |
-
1980
- 1980-12-16 JP JP17655180A patent/JPS57100692A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9651179B2 (en) | 2012-05-02 | 2017-05-16 | Norma Germany Gmbh | Profile clamp |
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