JPS573156A - Central processing device - Google Patents

Central processing device

Info

Publication number
JPS573156A
JPS573156A JP7525180A JP7525180A JPS573156A JP S573156 A JPS573156 A JP S573156A JP 7525180 A JP7525180 A JP 7525180A JP 7525180 A JP7525180 A JP 7525180A JP S573156 A JPS573156 A JP S573156A
Authority
JP
Japan
Prior art keywords
stack
address
cpu5
interrupt
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7525180A
Other languages
Japanese (ja)
Inventor
Hiroyuki Honda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Hokushin Electric Works Ltd
Yokogawa Hokushin Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hokushin Electric Works Ltd, Yokogawa Hokushin Electric Corp filed Critical Hokushin Electric Works Ltd
Priority to JP7525180A priority Critical patent/JPS573156A/en
Publication of JPS573156A publication Critical patent/JPS573156A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Storage Device Security (AREA)

Abstract

PURPOSE:To detect overflow of a stack, by generating an interrupt when contents of the register which indicates an address to be accessed in the stack exceed an address set preliminarily. CONSTITUTION:The upper limit address and the lower limit address of a stack 3 in a main memory 1 are defined as L and L-n respectively, and L and L-n are set to an upper limit address register RMAX7 and a lower limit address register RAMAIN 8 respectively. For example, when a CPU5 pushdowns to try to write data into an address L-n-1 of the stack 3, the contents of a stack pointer SP6 become L-n-2, and the output of an MC10 becomes ''1'', and an interrupt is generated for the CPU5. When the CPU5 pops up and the contents of the SP6 become L+1, the output of an MC9 becomes ''1'', and an interrupt is generated. Consequently, the CPU5 confirms these errors at the interruption processing time.
JP7525180A 1980-06-04 1980-06-04 Central processing device Pending JPS573156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7525180A JPS573156A (en) 1980-06-04 1980-06-04 Central processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7525180A JPS573156A (en) 1980-06-04 1980-06-04 Central processing device

Publications (1)

Publication Number Publication Date
JPS573156A true JPS573156A (en) 1982-01-08

Family

ID=13570810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7525180A Pending JPS573156A (en) 1980-06-04 1980-06-04 Central processing device

Country Status (1)

Country Link
JP (1) JPS573156A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057439A (en) * 1983-09-08 1985-04-03 Matsushita Electric Ind Co Ltd Stack overflow detector
JPS6231435A (en) * 1985-07-31 1987-02-10 Nec Corp Detecting system for end of stack

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057439A (en) * 1983-09-08 1985-04-03 Matsushita Electric Ind Co Ltd Stack overflow detector
JPS6231435A (en) * 1985-07-31 1987-02-10 Nec Corp Detecting system for end of stack

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