JPS648451A - Microprogram control device - Google Patents

Microprogram control device

Info

Publication number
JPS648451A
JPS648451A JP62164249A JP16424987A JPS648451A JP S648451 A JPS648451 A JP S648451A JP 62164249 A JP62164249 A JP 62164249A JP 16424987 A JP16424987 A JP 16424987A JP S648451 A JPS648451 A JP S648451A
Authority
JP
Japan
Prior art keywords
microinstruction
error
address
jump instruction
microprogram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62164249A
Other languages
Japanese (ja)
Inventor
Katsu Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62164249A priority Critical patent/JPS648451A/en
Publication of JPS648451A publication Critical patent/JPS648451A/en
Pending legal-status Critical Current

Links

Landscapes

  • Detection And Correction Of Errors (AREA)

Abstract

PURPOSE:To reduce the number of hardwares by writing a microinstruction in the address of a control memory specified by an address signal including the odd (even) number of logic '1's and a jump instruction to an error processor in the other address and reading out a memory by an address signal including logically processed bits. CONSTITUTION:A microinstruction or a jump instruction read out from a control device 11 to a microinstruction register 12 is decoded by a decoder 13, and in case of the microinstruction, the decoded result is sent to an unshown microprogram execution part to execute it. In case of the jump instruction, the decoder 13 suppresses the sending of the instruction and interrupts an error processor consisting of a service processor or the like. Consequently, the execution of the microprogram is suspended and the error processor executes prescribed processing. Since a control memory is provided with a parity check function and an error interruption deciding function and its capacity is duplicated, circuits for parity check, output control, error interruption, etc., can be omitted.
JP62164249A 1987-06-30 1987-06-30 Microprogram control device Pending JPS648451A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62164249A JPS648451A (en) 1987-06-30 1987-06-30 Microprogram control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62164249A JPS648451A (en) 1987-06-30 1987-06-30 Microprogram control device

Publications (1)

Publication Number Publication Date
JPS648451A true JPS648451A (en) 1989-01-12

Family

ID=15789508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62164249A Pending JPS648451A (en) 1987-06-30 1987-06-30 Microprogram control device

Country Status (1)

Country Link
JP (1) JPS648451A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57120303A (en) * 1981-01-19 1982-07-27 Seiko Epson Corp Rare earch cobalt permanent magnet
JPH0512047A (en) * 1991-07-04 1993-01-22 Fujitsu Ltd Error detecting circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57120303A (en) * 1981-01-19 1982-07-27 Seiko Epson Corp Rare earch cobalt permanent magnet
JPH0512047A (en) * 1991-07-04 1993-01-22 Fujitsu Ltd Error detecting circuit

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