JPS57194582A - Semiconductor integrated circuit device and manufacture thereof - Google Patents
Semiconductor integrated circuit device and manufacture thereofInfo
- Publication number
- JPS57194582A JPS57194582A JP7920981A JP7920981A JPS57194582A JP S57194582 A JPS57194582 A JP S57194582A JP 7920981 A JP7920981 A JP 7920981A JP 7920981 A JP7920981 A JP 7920981A JP S57194582 A JPS57194582 A JP S57194582A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- extended
- molybdenum
- fet
- gate electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract 3
- 229910052750 molybdenum Inorganic materials 0.000 abstract 3
- 239000011733 molybdenum Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000003475 lamination Methods 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000002844 melting Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 229910052751 metal Inorganic materials 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To improve the workability by means of making the interfacial characteristics excellent, enabling the direct contact and preventing the step disconnection and the like by a method wherein the laminated layer and the high melting point metal are respectively extended to be the wiring layer on the thin insulating layer and the thick insulating layer. CONSTITUTION:For example each gate electrode of MISFET Q1, Q2, Q3 are formed into the two layered lamination comprising the multilayers and the molybdenum layers 10, 8, 9 extended on the field SiO2 film 2 as the upper layers. On the other hand, in the FET Q3, the direct contact element with the N<+> type diffused region 20 through the through hole CH1 is formed into the two layered lamination comprising the multicrystal silicon layer 6 and the molybdenum layer 9. The formation is similar to the N<+> type diffused region 21 in the FET Q1 while the wiring 8, 9, 10 comprise the molybdenum layer only extended from the respective gate electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7920981A JPS57194582A (en) | 1981-05-27 | 1981-05-27 | Semiconductor integrated circuit device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7920981A JPS57194582A (en) | 1981-05-27 | 1981-05-27 | Semiconductor integrated circuit device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57194582A true JPS57194582A (en) | 1982-11-30 |
Family
ID=13683545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7920981A Pending JPS57194582A (en) | 1981-05-27 | 1981-05-27 | Semiconductor integrated circuit device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57194582A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01207951A (en) * | 1988-02-15 | 1989-08-21 | Nec Corp | Semiconductor device |
-
1981
- 1981-05-27 JP JP7920981A patent/JPS57194582A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01207951A (en) * | 1988-02-15 | 1989-08-21 | Nec Corp | Semiconductor device |
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