JPS57211767A - Mos integrated circuit - Google Patents

Mos integrated circuit

Info

Publication number
JPS57211767A
JPS57211767A JP9656081A JP9656081A JPS57211767A JP S57211767 A JPS57211767 A JP S57211767A JP 9656081 A JP9656081 A JP 9656081A JP 9656081 A JP9656081 A JP 9656081A JP S57211767 A JPS57211767 A JP S57211767A
Authority
JP
Japan
Prior art keywords
wiring
insulating film
gate electrodes
layer
wiring layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9656081A
Other languages
Japanese (ja)
Inventor
Hideki Fukuda
Hiroshi Miyashita
Toru Adachi
Tsunetaka Sudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP9656081A priority Critical patent/JPS57211767A/en
Publication of JPS57211767A publication Critical patent/JPS57211767A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To increase integration and to permit high-speed operation as well by a method wherein the first wiring layers are connected to the gate electrodes of elements through a layer insulating film in element regions provided in a semiconductor substrate. CONSTITUTION:Element regions (4 is a P MOS section, 5 is an N MOS section) consisting of a diffusion layer and a channel region are formed in a semiconductor substrate and a gate insulating film and gate electrodes 6-11 covering the substrate are provided. Next, the first insulating film covering these electrodes and the first wiring layer 15-17 are provided on the first insulating film to cross with the gate electrodes and the gate electrodes are connected to the first wiring layers on the element regions through contact holes 24-37. Next, the second insulating layer is provided on these surfaces and the second wiring layers 21, 22 crossing with the first wiring layers are provided on the second insulating layer. This eliminates the need for a region exclusively used for wiring. Therefore, integration is increased to shorten wiring length and operating speed increases.
JP9656081A 1981-06-24 1981-06-24 Mos integrated circuit Pending JPS57211767A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9656081A JPS57211767A (en) 1981-06-24 1981-06-24 Mos integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9656081A JPS57211767A (en) 1981-06-24 1981-06-24 Mos integrated circuit

Publications (1)

Publication Number Publication Date
JPS57211767A true JPS57211767A (en) 1982-12-25

Family

ID=14168425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9656081A Pending JPS57211767A (en) 1981-06-24 1981-06-24 Mos integrated circuit

Country Status (1)

Country Link
JP (1) JPS57211767A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04340252A (en) * 1990-07-27 1992-11-26 Mitsubishi Electric Corp Semiconductor integrated circuit device, arrangement and wiring method of cell
JP2010004066A (en) * 2009-09-16 2010-01-07 Renesas Technology Corp Semiconductor integrated circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04340252A (en) * 1990-07-27 1992-11-26 Mitsubishi Electric Corp Semiconductor integrated circuit device, arrangement and wiring method of cell
JP2010004066A (en) * 2009-09-16 2010-01-07 Renesas Technology Corp Semiconductor integrated circuit

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