JPS57126148A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the overetching of a contact section by positioning a poly Si layer of an uppermost layer to a diffusion layer of a substrate or a connecting section between the first layer poly Si wiring and metallic wiring in the circuit with the poly Si wiring of two layers or more. CONSTITUTION:In an IC such as an N channel MOSIC, wiring 41, a gate electrode 42 and the extracting wiring 43 of the drain diffusion layer 33 are formed onto a field film as the first layer. The connecting wiring 71 of the source diffusion layer 32 and the wiring 41 and wiring 72 on a field region are shaped as the seaond layer through the first layer film 6, but the poly Si layers 73, 74, 75 are also formed to the connecting sections on the diffusion layer 31, the gate 42 and the wiring 43 at the same time at that time. Al wiring 91-94 are shaped through the second layer film 8, and multilayer wiring structure is completed. Accordingly, since the overetching in a contact-hole forming process of the layer films 6, 8 can be prevented while difference in stages is reduced, density and integration can be increased.