JPS5756962A - Manufacture of integrated circuit - Google Patents

Manufacture of integrated circuit

Info

Publication number
JPS5756962A
JPS5756962A JP55052861A JP5286180A JPS5756962A JP S5756962 A JPS5756962 A JP S5756962A JP 55052861 A JP55052861 A JP 55052861A JP 5286180 A JP5286180 A JP 5286180A JP S5756962 A JPS5756962 A JP S5756962A
Authority
JP
Japan
Prior art keywords
oxidized film
integrated circuit
forming
polysilicon
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55052861A
Other languages
Japanese (ja)
Other versions
JPS5943095B2 (en
Inventor
Fujio Masuoka
Hisakazu Iizuka
Tai Sato
Yukio Omori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55052861A priority Critical patent/JPS5943095B2/en
Publication of JPS5756962A publication Critical patent/JPS5756962A/en
Publication of JPS5943095B2 publication Critical patent/JPS5943095B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To enable the decrease in the size of an integrated circuit and to enable the increase in the density of the integrated circuit by forming a polysilicon layer on an oxidized film formed on a substrate, forming an oxidized film on the surface as an interelement isolating region, thereby reducing the field film of an MOSIC and preventing the disconnection of an upper layer wire. CONSTITUTION:After an oxidized film 3 (1,500Angstrom and a polysilicon 4 (2,000Angstrom ) are laminated on an IC substrate 1 forming many FETs, an element forming region is opened with a hole. Then, a gate structure having a gate oxidized film and a polysilicon 6a (5,000Angstrom ) is formed, and diffused layers 7, 8 are formed in the source and drain regions. Subsequently, an oxidized film 9 is formed on the overall surface, a contacting hole is opened, and an aluminum wire 12 is connected. In this manner, the polysilicon layer 4 buried in the films 3, 5 is formed, thereby reducing the thickness of the field unit and preventing the disconnection of the wire. Since the positioning can be facilitated accurately, the increase in the density can be improved.
JP55052861A 1980-04-23 1980-04-23 Integrated circuit manufacturing method Expired JPS5943095B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55052861A JPS5943095B2 (en) 1980-04-23 1980-04-23 Integrated circuit manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55052861A JPS5943095B2 (en) 1980-04-23 1980-04-23 Integrated circuit manufacturing method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3446572A Division JPS5725985B2 (en) 1972-04-07 1972-04-07

Publications (2)

Publication Number Publication Date
JPS5756962A true JPS5756962A (en) 1982-04-05
JPS5943095B2 JPS5943095B2 (en) 1984-10-19

Family

ID=12926642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55052861A Expired JPS5943095B2 (en) 1980-04-23 1980-04-23 Integrated circuit manufacturing method

Country Status (1)

Country Link
JP (1) JPS5943095B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839177A (en) * 1971-09-22 1973-06-08
JPS48102984A (en) * 1972-04-07 1973-12-24

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839177A (en) * 1971-09-22 1973-06-08
JPS48102984A (en) * 1972-04-07 1973-12-24

Also Published As

Publication number Publication date
JPS5943095B2 (en) 1984-10-19

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