JPS63204628A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To reduce the electromigration by a method wherein a power supply wiring is formed of the first wiring layer comprising the same material as that of a gate electrode of MIS transistor and the second wiring layer provided on the first wiring layer through the intermediary of an interlayer insulating film with connecting holes. CONSTITUTION:The first wiring layer 7 formed of the same material as that of a polysilicon gate electrode 4 of MIS transistor of semiconductor integrated circuit in the same process as that of gate electrode 4 is arranged below the overall surface of the second wiring layer 5' comprising Al holding an interlayer insulating layer 8 while a power supply wiring connecting two wiring layers by at least one or more connecting holes made in the interlayer insulating layer 8 is provided. Through these procedures, the power supply density of the first wiring layer comprising the power supply wiring can be reduced without increasing processes to reduce the electromigration.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor integrated circuits, and particularly to reducing electromigration in power supply wiring of MO8 type semiconductor integrated circuits.

[Conventional technology]

Conventionally, this type of MO3 type semiconductor integrated circuit has an N-type diffusion region 2 formed in a P-type semiconductor substrate 1, and a gate oxide film 3 above the channel region between each of the N-type diffusion regions 2, as shown in FIG. The connection between the N-channel MO8T consisting of the polysilicon gate electrode 4 formed via the polysilicon gate electrode 4 and other N-channel MO8T formed on the same substrate, and the connection between the polysilicon gate electrode 4 forming the MO3T or It is composed of a vine aluminum wiring 6 that connects an N-type diffusion region and a power supply aluminum wiring 5.

In the MO3 type semiconductor integrated circuit having the above structure, the power supply aluminum wiring 5 is a single wiring layer formed by the same manufacturing process as that for forming the aluminum wiring 6.

[Problem that the invention seeks to solve]

The above-mentioned conventional semiconductor integrated circuit has the disadvantage that the power supply wiring is only aluminum wiring, and when a large number of transistors are connected, a large current flows through the aluminum wiring, increasing the current density, making it easy for electromigration to occur. .

[Means for solving problems]

The semiconductor integrated circuit of the present invention has an M provided on a semiconductor substrate.
In a semiconductor integrated circuit including an MIS transistor and a power supply wiring for supplying power to the MIS transistor,
The power supply wiring includes a first wiring layer made of the same material as the gate electrode of the MIS transistor, and a second wiring layer provided thereon via a glabella insulating layer having a connection hole.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view of a semiconductor chip showing a first embodiment of the present invention. Connection of the N-channel MOST made up of the polysilicon gate electrode 4 formed via the wiring M3 and other N-channel MOSTs formed on the same substrate, and the polysilicon gate electrode forming the N-channel MOST Alternatively, the aluminum wiring 6 connecting the N-type diffusion region and the second wiring layer 5' made of aluminum, which is part of the power wiring, and the polysilicon gate electrode 4 formed in the same manufacturing process. The first wiring layer 7 is formed on the entire lower surface of the second wiring layer 5' with an interlayer insulating layer 8 made of silicon oxide sandwiched therebetween, and is provided on the glabella insulating layer 8. The first wiring layer 7 and the second wiring layer 5 are connected by at least one connection hole.
' are connected to form the power supply wiring. Therefore, the current is the first. Since the current is shunted to the second wiring layer, the current density can be lowered compared to the case of only aluminum wiring.
Electromigration can be reduced.

FIG. 2 is a sectional view of a semiconductor chip showing a second embodiment of the present invention.

This embodiment is the same as the first embodiment except that molybdenum, a high melting point metal, is used instead of polysilicon.

Molybdenum has better conductivity than polysilicon, so the first
Since more current can be shunted to the wiring layer 7', electromigration in the second wiring layer 5' made of aluminum can be further reduced.

〔Effect of the invention〕

As explained above, the present invention provides MIS for semiconductor integrated circuits.
A first wiring layer formed of the same material and in the same manufacturing process as the gate electrode of the transistor is disposed on the entire lower surface of the first wiring layer made of aluminum with a glabella insulating layer sandwiched therebetween, and at least one Since the power supply wiring has two wiring layers connected through three or more connection holes, the current density in the first wiring layer that constitutes the power supply wiring can be lowered without increasing the manufacturing process.
It has the effect of reducing migration.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor chip showing a first embodiment of the present invention, FIG. 2 is a sectional view of a semiconductor chip showing a second embodiment of the invention, and FIG. 3 is a conventional MO9 type semiconductor integrated circuit. 1 is a cross-sectional view of a semiconductor chip showing an example of a circuit. l... Semiconductor substrate, 2... Diffusion region, 3... Gate oxide film, 4... Polysilicon gate electrode, 5...
・Power supply aluminum wiring, 5′...second wiring layer, 6・
... Aluminum wiring, 7... First wiring layer, 8...
Interlayer insulating layer, 9... Cover oxide film, 10... Field oxide film, 11... Molybdenum gate electrode. Agent and patent attorney Susumu Uchihara (τ-5<];

Claims (1)

[Claims] In a semiconductor integrated circuit including an MIS transistor provided on a semiconductor substrate and a power supply wiring for supplying power to the MIS transistor, the power supply wiring is connected to the MIS transistor.
1. A semiconductor integrated circuit comprising a first wiring layer made of the same material as a gate electrode of a transistor, and a second wiring layer provided thereon via an interlayer insulating layer having a connection hole.