JPS57176751A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57176751A
JPS57176751A JP56059724A JP5972481A JPS57176751A JP S57176751 A JPS57176751 A JP S57176751A JP 56059724 A JP56059724 A JP 56059724A JP 5972481 A JP5972481 A JP 5972481A JP S57176751 A JPS57176751 A JP S57176751A
Authority
JP
Japan
Prior art keywords
resin
lead
mounting
same plane
outer lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56059724A
Other languages
Japanese (ja)
Inventor
Yoshimasa Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56059724A priority Critical patent/JPS57176751A/en
Publication of JPS57176751A publication Critical patent/JPS57176751A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enhance the mechanical strength and the mounting density of a semiconductor by setting an outer lead of a lead frame bent upwardly at the mounting part and bonding part and the lower surface of molding resin in the same plane. CONSTITUTION:A semiconductor chip 1 is mounted on the mounting part 2 of a lead frame bent upwardly, a wire is bonded to the bonding part 6, is molded with resin 7, the outer lead 4 of the lead is projected from the lower surface of the resin 7, and the lower surface of the outer lead and the lower surface of the resin are drawn in the same plane. In this manner, no crack is produced at the resin at the time of bending the lead, thereby enhancing the mounting density.
JP56059724A 1981-04-22 1981-04-22 Semiconductor device Pending JPS57176751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56059724A JPS57176751A (en) 1981-04-22 1981-04-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56059724A JPS57176751A (en) 1981-04-22 1981-04-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57176751A true JPS57176751A (en) 1982-10-30

Family

ID=13121430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56059724A Pending JPS57176751A (en) 1981-04-22 1981-04-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57176751A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592155U (en) * 1982-06-29 1984-01-09 日本電気株式会社 Resin-encapsulated integrated circuit
JPS5991719A (en) * 1982-11-17 1984-05-26 Nippon Dempa Kogyo Co Ltd Piezoelectric oscillator
JPS59121862A (en) * 1982-12-28 1984-07-14 Fujitsu Ltd Resin-sealed semiconductor device
JPS59227148A (en) * 1983-06-07 1984-12-20 Dainippon Printing Co Ltd Lead frame for integrated circuit
JPS60156758U (en) * 1984-03-28 1985-10-18 株式会社 フジ電科 airtight terminal
JPS63151058A (en) * 1986-12-16 1988-06-23 Matsushita Electronics Corp Resin packaged type semiconductor device
JPH0349U (en) * 1989-05-19 1991-01-07
JPH0321854U (en) * 1989-07-11 1991-03-05
JPH0546045U (en) * 1991-11-14 1993-06-18 金星エレクトロン株式会社 Semiconductor package
WO1998035382A1 (en) * 1997-02-10 1998-08-13 Matsushita Electronics Corporation Resin sealed semiconductor device and method for manufacturing the same
US6126885A (en) * 1997-06-27 2000-10-03 Matsushita Electronics Corporation Method for manufacturing resin-molded semiconductor device
JP2002291196A (en) * 2001-03-26 2002-10-04 Matsushita Electric Ind Co Ltd Surface mount motor and electronic equipment having the same

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592155U (en) * 1982-06-29 1984-01-09 日本電気株式会社 Resin-encapsulated integrated circuit
JPS635250Y2 (en) * 1982-06-29 1988-02-12
JPS5991719A (en) * 1982-11-17 1984-05-26 Nippon Dempa Kogyo Co Ltd Piezoelectric oscillator
JPS59121862A (en) * 1982-12-28 1984-07-14 Fujitsu Ltd Resin-sealed semiconductor device
JPS59227148A (en) * 1983-06-07 1984-12-20 Dainippon Printing Co Ltd Lead frame for integrated circuit
JPS60156758U (en) * 1984-03-28 1985-10-18 株式会社 フジ電科 airtight terminal
JPH0138918Y2 (en) * 1984-03-28 1989-11-21
JPS63151058A (en) * 1986-12-16 1988-06-23 Matsushita Electronics Corp Resin packaged type semiconductor device
JPH0349U (en) * 1989-05-19 1991-01-07
JPH0321854U (en) * 1989-07-11 1991-03-05
JPH0546045U (en) * 1991-11-14 1993-06-18 金星エレクトロン株式会社 Semiconductor package
USRE36097E (en) * 1991-11-14 1999-02-16 Lg Semicon, Ltd. Semiconductor package for a semiconductor chip having centrally located bottom bond pads
USRE37413E1 (en) * 1991-11-14 2001-10-16 Hyundai Electronics Industries Co., Ltd. Semiconductor package for a semiconductor chip having centrally located bottom bond pads
WO1998035382A1 (en) * 1997-02-10 1998-08-13 Matsushita Electronics Corporation Resin sealed semiconductor device and method for manufacturing the same
US6291274B1 (en) 1997-02-10 2001-09-18 Matsushita Electric Industrial Co., Ltd. Resin molded semiconductor device and method for manufacturing the same
US6126885A (en) * 1997-06-27 2000-10-03 Matsushita Electronics Corporation Method for manufacturing resin-molded semiconductor device
US6258314B1 (en) 1997-06-27 2001-07-10 Matsushita Electronics Corporation Method for manufacturing resin-molded semiconductor device
JP2002291196A (en) * 2001-03-26 2002-10-04 Matsushita Electric Ind Co Ltd Surface mount motor and electronic equipment having the same

Similar Documents

Publication Publication Date Title
JPS57147260A (en) Manufacture of resin-sealed semiconductor device and lead frame used therefor
JPS57176751A (en) Semiconductor device
JPS55163868A (en) Lead frame and semiconductor device using the same
JPS5623765A (en) Molded type electronic device
JPS5763850A (en) Semiconductor device
JPS6482554A (en) Resin-sealed semiconductor device
JPS6411352A (en) Hollow mold package
JPS5627941A (en) Manufacture of semiconductor device
JPS5734375A (en) Semiconductor integrated circuit device
JPS5726459A (en) Glass-sealed semiconductor device
JPS5768088A (en) Photosemiconductor device
JPS5743435A (en) Electronic part
JPS6455291A (en) Integrated circuit device
JPS55163867A (en) Lead frame for semiconductor device
JPS5723254A (en) Semiconductor device
JPS56101749A (en) Manufacture of circuit substrate for watch
JPS54114975A (en) Semiconductor device
JPS5793534A (en) Semiconductor device
JPS644031A (en) Manufacture of semiconductor device having window for light transmission
JPS56103482A (en) Manufacture of semiconductor device for photoelectric conversion
JPS5710954A (en) Semiconductor device
JPS6441254A (en) Resin-sealed type semiconductor device
JPS6427236A (en) Wire bonding method
JPS56155556A (en) Semiconductor device
JPS553642A (en) Manufacturing semiconductor device