JPS553642A - Manufacturing semiconductor device - Google Patents
Manufacturing semiconductor deviceInfo
- Publication number
- JPS553642A JPS553642A JP7537778A JP7537778A JPS553642A JP S553642 A JPS553642 A JP S553642A JP 7537778 A JP7537778 A JP 7537778A JP 7537778 A JP7537778 A JP 7537778A JP S553642 A JPS553642 A JP S553642A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- leads
- frame
- lead frame
- solders
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To eliminate the Ag migration problem and secure an excellent connecting property of solders by covering Al on a lead frame, and by removing A l from the surfaces of the protruded leads after forming semiconductor elements and sealing them by insulators. CONSTITUTION:An Al cover 2 is formed on the surface of a plate material 1 of phosphor bronze and the like. Then, a continuous lead frame body 3 having a plurality of lead-frame patterns are made. After that, a semiconductor element 4 is formed on the Al formation of the lead frame. Then, the semiconductor element and inner leads are molded by epoxy resin 5 and the like in such a way they are enclosed. Thereafter, the continuous frame is cut into individual units, unnecessary portions between the leads are removed, and leads 6 are bent in one direction. Then Al on the lead surface protruded from the mask of the resinous seal 5 is removed. As a result Ag migration problem is eliminated by forming the Al film on the bonding portion, and excellent connecting property of solders at the lead portion is secured.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7537778A JPS553642A (en) | 1978-06-23 | 1978-06-23 | Manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7537778A JPS553642A (en) | 1978-06-23 | 1978-06-23 | Manufacturing semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS553642A true JPS553642A (en) | 1980-01-11 |
Family
ID=13574441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7537778A Pending JPS553642A (en) | 1978-06-23 | 1978-06-23 | Manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS553642A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5799763A (en) * | 1980-12-12 | 1982-06-21 | Hitachi Cable Ltd | Manufacture of lead frame for integrated circuit |
JPS5925257A (en) * | 1982-07-30 | 1984-02-09 | Shinko Electric Ind Co Ltd | Manufacture of lead frame for low melting-point glass seal type semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51112273A (en) * | 1975-03-28 | 1976-10-04 | Hitachi Ltd | Lead frame for resin mold type semiconductor device |
JPS51137375A (en) * | 1975-05-22 | 1976-11-27 | Mitsubishi Electric Corp | Semi conductor device |
JPS5464467A (en) * | 1977-10-31 | 1979-05-24 | Nippon Paint Co Ltd | Electronic part |
-
1978
- 1978-06-23 JP JP7537778A patent/JPS553642A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51112273A (en) * | 1975-03-28 | 1976-10-04 | Hitachi Ltd | Lead frame for resin mold type semiconductor device |
JPS51137375A (en) * | 1975-05-22 | 1976-11-27 | Mitsubishi Electric Corp | Semi conductor device |
JPS5464467A (en) * | 1977-10-31 | 1979-05-24 | Nippon Paint Co Ltd | Electronic part |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5799763A (en) * | 1980-12-12 | 1982-06-21 | Hitachi Cable Ltd | Manufacture of lead frame for integrated circuit |
JPS6257106B2 (en) * | 1980-12-12 | 1987-11-30 | Hitachi Cable | |
JPS5925257A (en) * | 1982-07-30 | 1984-02-09 | Shinko Electric Ind Co Ltd | Manufacture of lead frame for low melting-point glass seal type semiconductor device |
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