JPS57160166A - Non-volatile semiconductor memory - Google Patents

Non-volatile semiconductor memory

Info

Publication number
JPS57160166A
JPS57160166A JP56045282A JP4528281A JPS57160166A JP S57160166 A JPS57160166 A JP S57160166A JP 56045282 A JP56045282 A JP 56045282A JP 4528281 A JP4528281 A JP 4528281A JP S57160166 A JPS57160166 A JP S57160166A
Authority
JP
Japan
Prior art keywords
region
depletion layer
generated
substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56045282A
Other languages
Japanese (ja)
Inventor
Yoshikazu Kojima
Masafumi Shinpo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP56045282A priority Critical patent/JPS57160166A/en
Publication of JPS57160166A publication Critical patent/JPS57160166A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To improve the integration of a memory by a method wherein a depletion layer generated between the second semicondutor region and the first semiconductor region is connected to a depletion layer generated between the third semiconductor region and the first semiconductor region. CONSTITUTION:When the distance L between an N type control gate region 2 and an N type injector region 3 provided on the surface of a P type substrate 1 is formed shorter than the product of the width of a depletion layer 3b generated between the region 3 and the semiconductor substrate 1 and the width of a depletion layer 2b generated by ranging from the region 2 up to under an insulating film 5, the depletion layer 3b is connected to the depletion leyer 2b. In this way, electrons supplied from the region 3 pass through a depletion layer 7 generated between the region 3 and the substrate 1 and a depletion layer 7 generated between the region 2 and the substrate 1 and the electrons are injected into a stray gate electrode 4.
JP56045282A 1981-03-27 1981-03-27 Non-volatile semiconductor memory Pending JPS57160166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56045282A JPS57160166A (en) 1981-03-27 1981-03-27 Non-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56045282A JPS57160166A (en) 1981-03-27 1981-03-27 Non-volatile semiconductor memory

Publications (1)

Publication Number Publication Date
JPS57160166A true JPS57160166A (en) 1982-10-02

Family

ID=12714946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56045282A Pending JPS57160166A (en) 1981-03-27 1981-03-27 Non-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS57160166A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158633A (en) * 2007-12-26 2009-07-16 Sanyo Electric Co Ltd Nonvolatile semiconductor memory device and method for manufacturing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5388583A (en) * 1977-01-13 1978-08-04 Nec Corp Non-volatile memory element
JPS5534432A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5388583A (en) * 1977-01-13 1978-08-04 Nec Corp Non-volatile memory element
JPS5534432A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009158633A (en) * 2007-12-26 2009-07-16 Sanyo Electric Co Ltd Nonvolatile semiconductor memory device and method for manufacturing the same

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