JPS5572069A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5572069A JPS5572069A JP7298979A JP7298979A JPS5572069A JP S5572069 A JPS5572069 A JP S5572069A JP 7298979 A JP7298979 A JP 7298979A JP 7298979 A JP7298979 A JP 7298979A JP S5572069 A JPS5572069 A JP S5572069A
- Authority
- JP
- Japan
- Prior art keywords
- region
- film
- type
- sio
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Static Random-Access Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE: To compensate for leakage current of the MOS transistor by feeding a slight current to the drain region from a semiconductor substrate composing a static type MOS memory used for the power supply line.
CONSTITUTION: The SiO2 film 34 is spread over the specified region 32 on the surface of the n--type Si substrate 21 and used for the mask to form a p--type region 22. After the removal of the film 34, a thick field SiO2 film 27 is formed at the end of the region 22. Subsequently, a polycrystaline Si-layer 35 is arranged on the region 32 covering over the film 27 located on the both sides thereof while a polycrystaline Si gate electrode 25 on the region 22 through a thin gate SiO2 film 27 while a SiO2 film 36 is formed on the specified region of the layer 35. Thereafter, with the electrode 25 as a mask, an n-type source and the drain regions 23 and 24 are formed by diffusion on the region 22. At the same time, the layer 35 except for under the film 36 is converted into an n-type layers 30 and 31 while an n-type region 33 is formed under the layer 31. In this manner, the region 23 is fed with a slight current from the substrate 21 by way of the layers 33, 31, 29 and 30.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7298979A JPS5572069A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7298979A JPS5572069A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9360885A Division JPS6134968A (en) | 1985-05-02 | 1985-05-02 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5572069A true JPS5572069A (en) | 1980-05-30 |
| JPS6238865B2 JPS6238865B2 (en) | 1987-08-20 |
Family
ID=13505309
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7298979A Granted JPS5572069A (en) | 1979-06-12 | 1979-06-12 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5572069A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60246666A (en) * | 1984-05-22 | 1985-12-06 | Seiko Instr & Electronics Ltd | Mis transistor inverter |
| US4792841A (en) * | 1980-08-15 | 1988-12-20 | Hitachi, Ltd. | Semiconductor devices and a process for producing the same |
| US4853894A (en) * | 1986-07-09 | 1989-08-01 | Hitachi, Ltd. | Static random-access memory having multilevel conductive layer |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0623891Y2 (en) * | 1987-04-01 | 1994-06-22 | 昭和アルミニウム株式会社 | Cold storage container |
| JPS63162280U (en) * | 1987-04-09 | 1988-10-24 |
-
1979
- 1979-06-12 JP JP7298979A patent/JPS5572069A/en active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4792841A (en) * | 1980-08-15 | 1988-12-20 | Hitachi, Ltd. | Semiconductor devices and a process for producing the same |
| JPS60246666A (en) * | 1984-05-22 | 1985-12-06 | Seiko Instr & Electronics Ltd | Mis transistor inverter |
| US4853894A (en) * | 1986-07-09 | 1989-08-01 | Hitachi, Ltd. | Static random-access memory having multilevel conductive layer |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6238865B2 (en) | 1987-08-20 |
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