JPS571226A - Manufacture of semiconductor substrate with buried diffusion layer - Google Patents

Manufacture of semiconductor substrate with buried diffusion layer

Info

Publication number
JPS571226A
JPS571226A JP7470380A JP7470380A JPS571226A JP S571226 A JPS571226 A JP S571226A JP 7470380 A JP7470380 A JP 7470380A JP 7470380 A JP7470380 A JP 7470380A JP S571226 A JPS571226 A JP S571226A
Authority
JP
Japan
Prior art keywords
layer
oxide film
substrate
polycrystalline
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7470380A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6125209B2 (enrdf_load_stackoverflow
Inventor
Yoshihiro Tsunoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP7470380A priority Critical patent/JPS571226A/ja
Publication of JPS571226A publication Critical patent/JPS571226A/ja
Publication of JPS6125209B2 publication Critical patent/JPS6125209B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
JP7470380A 1980-06-03 1980-06-03 Manufacture of semiconductor substrate with buried diffusion layer Granted JPS571226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7470380A JPS571226A (en) 1980-06-03 1980-06-03 Manufacture of semiconductor substrate with buried diffusion layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7470380A JPS571226A (en) 1980-06-03 1980-06-03 Manufacture of semiconductor substrate with buried diffusion layer

Publications (2)

Publication Number Publication Date
JPS571226A true JPS571226A (en) 1982-01-06
JPS6125209B2 JPS6125209B2 (enrdf_load_stackoverflow) 1986-06-14

Family

ID=13554845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7470380A Granted JPS571226A (en) 1980-06-03 1980-06-03 Manufacture of semiconductor substrate with buried diffusion layer

Country Status (1)

Country Link
JP (1) JPS571226A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58184738A (ja) * 1982-03-30 1983-10-28 レイセオン カンパニ− 半導体製造方法
JPS61208829A (ja) * 1985-03-14 1986-09-17 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6248041A (ja) * 1985-08-28 1987-03-02 Nec Corp 半導体集積回路装置
JPH01100967A (ja) * 1987-10-13 1989-04-19 Nec Corp 半導体装置の製造方法
JPH04237118A (ja) * 1991-01-22 1992-08-25 Canon Inc 半導体装置の製造方法
JP2015133412A (ja) * 2014-01-14 2015-07-23 三菱電機株式会社 半導体装置の製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58184738A (ja) * 1982-03-30 1983-10-28 レイセオン カンパニ− 半導体製造方法
JPS61208829A (ja) * 1985-03-14 1986-09-17 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS6248041A (ja) * 1985-08-28 1987-03-02 Nec Corp 半導体集積回路装置
JPH01100967A (ja) * 1987-10-13 1989-04-19 Nec Corp 半導体装置の製造方法
JPH04237118A (ja) * 1991-01-22 1992-08-25 Canon Inc 半導体装置の製造方法
JP2015133412A (ja) * 2014-01-14 2015-07-23 三菱電機株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS6125209B2 (enrdf_load_stackoverflow) 1986-06-14

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