JPS5671929A - Treatment for silicon substrate - Google Patents

Treatment for silicon substrate

Info

Publication number
JPS5671929A
JPS5671929A JP14870579A JP14870579A JPS5671929A JP S5671929 A JPS5671929 A JP S5671929A JP 14870579 A JP14870579 A JP 14870579A JP 14870579 A JP14870579 A JP 14870579A JP S5671929 A JPS5671929 A JP S5671929A
Authority
JP
Japan
Prior art keywords
substrate
distortion
layers
epitaxial growth
microdefects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14870579A
Other languages
Japanese (ja)
Inventor
Yukinobu Tanno
Hideki Tsuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP14870579A priority Critical patent/JPS5671929A/en
Publication of JPS5671929A publication Critical patent/JPS5671929A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To minimize microdefects generating on an epitaxial growth surface by forming mechanical distortion layers on the reverse side of a substrate when an epitaxial layer is grown on the surface of a semiconductor substrate wherein heat treatment is applied in a dry oxide atmosphere at 700-1,000 deg.C. CONSTITUTION:Distortion 4 is intentionally formed on the reverse side of a semiconductor substrate 1 making epitaxial growth by a mechanical means. And heat treatment is applied to the substrate 1 at 700-1,000 deg.C for 10-60hr under a dry oxide atmosphere to generate defective layers 5 in the substrate 1. Next, an SiO2 film on the substrate 1 surface grown with the defective layers 5 is removed and the substrate 1 is housed in an epitaxial growth furnace to grow an epitaxial layer 2 by guiding H2 carrier gas and SiH4 gas. In this way, it is possible to remarkably decrease the density of microdefects 3 generating on the layer 2 surface as low as -2X10<3> pieces/cm<2> by gettering geometric effect with the sink by the distortion 4 and the sink of the defective layers 5 by low temperature oxidation.
JP14870579A 1979-11-16 1979-11-16 Treatment for silicon substrate Pending JPS5671929A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14870579A JPS5671929A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14870579A JPS5671929A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Publications (1)

Publication Number Publication Date
JPS5671929A true JPS5671929A (en) 1981-06-15

Family

ID=15458745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14870579A Pending JPS5671929A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Country Status (1)

Country Link
JP (1) JPS5671929A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116820A (en) * 1989-09-29 1991-05-17 Shin Etsu Handotai Co Ltd Misfit transposition control method
JPH04267339A (en) * 1991-02-21 1992-09-22 Toshiba Corp Semiconductor substrate and its manufacture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03116820A (en) * 1989-09-29 1991-05-17 Shin Etsu Handotai Co Ltd Misfit transposition control method
JPH04267339A (en) * 1991-02-21 1992-09-22 Toshiba Corp Semiconductor substrate and its manufacture

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