JPS5671928A - Treatment for silicon substrate - Google Patents

Treatment for silicon substrate

Info

Publication number
JPS5671928A
JPS5671928A JP14870479A JP14870479A JPS5671928A JP S5671928 A JPS5671928 A JP S5671928A JP 14870479 A JP14870479 A JP 14870479A JP 14870479 A JP14870479 A JP 14870479A JP S5671928 A JPS5671928 A JP S5671928A
Authority
JP
Japan
Prior art keywords
layers
substrate
distortion
reverse side
epitaxial growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14870479A
Other languages
Japanese (ja)
Inventor
Yukinobu Tanno
Hideki Tsuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP14870479A priority Critical patent/JPS5671928A/en
Publication of JPS5671928A publication Critical patent/JPS5671928A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments
    • H01L21/02661In-situ cleaning

Abstract

PURPOSE:To minimize microdefects generating on an epitaxial growth surface by forming distortion layers on the reverse side of a substrate when an epitaxial layer is grown on the surface of a semiconductor substrate wherein the distortion layers are covered with a compound semiconductor and heat treatment is applied in a dry oxide atmosphere at 700-1,000 deg.C. CONSTITUTION:Distortion layers 3 are intentionally formed on the reverse side of a semiconductor substrate 1 making epitaxial growth by using a mechanical means. And an Si3N4 film 5 is formed on the whole reverse side at low temperatures (-700 deg.C) to protect the distortion layers. Next, heat treatment is applied to the substrate 1 at 700-1,000 deg.C for 10-60hr under a dry oxide atmosphere to generate defective layers 6 in the substrate 1. Then, an SiO2 film on the surface grown with the defective layers 6 is removed and the substrate 1 is housed in an epitaxial growth furnace to grow an epitaxial layer 2 by guiding H2 carrier gas and SiH4 gas. In this way, it is possible to minimize the density of microdefects 4 generating on the layer 2 as low as -1X10<3> pieces/cm<2> by gettering geometric effect by the distortion layers 3, the film 5 and the defective layers 6 by low temperature oxidation.
JP14870479A 1979-11-16 1979-11-16 Treatment for silicon substrate Pending JPS5671928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14870479A JPS5671928A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14870479A JPS5671928A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Publications (1)

Publication Number Publication Date
JPS5671928A true JPS5671928A (en) 1981-06-15

Family

ID=15458722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14870479A Pending JPS5671928A (en) 1979-11-16 1979-11-16 Treatment for silicon substrate

Country Status (1)

Country Link
JP (1) JPS5671928A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS586140A (en) * 1981-07-03 1983-01-13 Nec Corp Manufacture of silicon wafer
JPS5892212A (en) * 1981-11-27 1983-06-01 Fujitsu Ltd Semiconductor device and manufacture therefor
JPS58134430A (en) * 1982-02-04 1983-08-10 Nippon Denso Co Ltd Manufacture of semiconductor device
JPS58207641A (en) * 1982-05-28 1983-12-03 Nec Corp Substrate for semiconductor device
JPS59115519A (en) * 1982-12-23 1984-07-04 ニチコン株式会社 Electrolytic condenser
JPH01161756A (en) * 1987-11-18 1989-06-26 Intersil Inc Cmos integrated circuit and its manufacture
JPH03116820A (en) * 1989-09-29 1991-05-17 Shin Etsu Handotai Co Ltd Misfit transposition control method
EP0798765A2 (en) * 1996-03-28 1997-10-01 Shin-Etsu Handotai Company Limited Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS586140A (en) * 1981-07-03 1983-01-13 Nec Corp Manufacture of silicon wafer
JPS5892212A (en) * 1981-11-27 1983-06-01 Fujitsu Ltd Semiconductor device and manufacture therefor
JPS58134430A (en) * 1982-02-04 1983-08-10 Nippon Denso Co Ltd Manufacture of semiconductor device
JPH0345535B2 (en) * 1982-02-04 1991-07-11 Nippon Denso Co
JPS58207641A (en) * 1982-05-28 1983-12-03 Nec Corp Substrate for semiconductor device
JPS59115519A (en) * 1982-12-23 1984-07-04 ニチコン株式会社 Electrolytic condenser
JPH01161756A (en) * 1987-11-18 1989-06-26 Intersil Inc Cmos integrated circuit and its manufacture
JPH03116820A (en) * 1989-09-29 1991-05-17 Shin Etsu Handotai Co Ltd Misfit transposition control method
EP0798765A2 (en) * 1996-03-28 1997-10-01 Shin-Etsu Handotai Company Limited Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface
EP0798765A3 (en) * 1996-03-28 1998-08-05 Shin-Etsu Handotai Company Limited Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface
US5834363A (en) * 1996-03-28 1998-11-10 Shin-Etsu Handotai Co., Ltd. Method of manufacturing semiconductor wafer, semiconductor wafer manufactured by the same, semiconductor epitaxial wafer, and method of manufacturing the semiconductor epitaxial wafer

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