JPS5671928A - Treatment for silicon substrate - Google Patents
Treatment for silicon substrateInfo
- Publication number
- JPS5671928A JPS5671928A JP14870479A JP14870479A JPS5671928A JP S5671928 A JPS5671928 A JP S5671928A JP 14870479 A JP14870479 A JP 14870479A JP 14870479 A JP14870479 A JP 14870479A JP S5671928 A JPS5671928 A JP S5671928A
- Authority
- JP
- Japan
- Prior art keywords
- layers
- substrate
- distortion
- reverse side
- epitaxial growth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
Abstract
PURPOSE:To minimize microdefects generating on an epitaxial growth surface by forming distortion layers on the reverse side of a substrate when an epitaxial layer is grown on the surface of a semiconductor substrate wherein the distortion layers are covered with a compound semiconductor and heat treatment is applied in a dry oxide atmosphere at 700-1,000 deg.C. CONSTITUTION:Distortion layers 3 are intentionally formed on the reverse side of a semiconductor substrate 1 making epitaxial growth by using a mechanical means. And an Si3N4 film 5 is formed on the whole reverse side at low temperatures (-700 deg.C) to protect the distortion layers. Next, heat treatment is applied to the substrate 1 at 700-1,000 deg.C for 10-60hr under a dry oxide atmosphere to generate defective layers 6 in the substrate 1. Then, an SiO2 film on the surface grown with the defective layers 6 is removed and the substrate 1 is housed in an epitaxial growth furnace to grow an epitaxial layer 2 by guiding H2 carrier gas and SiH4 gas. In this way, it is possible to minimize the density of microdefects 4 generating on the layer 2 as low as -1X10<3> pieces/cm<2> by gettering geometric effect by the distortion layers 3, the film 5 and the defective layers 6 by low temperature oxidation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14870479A JPS5671928A (en) | 1979-11-16 | 1979-11-16 | Treatment for silicon substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14870479A JPS5671928A (en) | 1979-11-16 | 1979-11-16 | Treatment for silicon substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5671928A true JPS5671928A (en) | 1981-06-15 |
Family
ID=15458722
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14870479A Pending JPS5671928A (en) | 1979-11-16 | 1979-11-16 | Treatment for silicon substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5671928A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS586140A (en) * | 1981-07-03 | 1983-01-13 | Nec Corp | Manufacture of silicon wafer |
JPS5892212A (en) * | 1981-11-27 | 1983-06-01 | Fujitsu Ltd | Semiconductor device and manufacture therefor |
JPS58134430A (en) * | 1982-02-04 | 1983-08-10 | Nippon Denso Co Ltd | Manufacture of semiconductor device |
JPS58207641A (en) * | 1982-05-28 | 1983-12-03 | Nec Corp | Substrate for semiconductor device |
JPS59115519A (en) * | 1982-12-23 | 1984-07-04 | ニチコン株式会社 | Electrolytic condenser |
JPH01161756A (en) * | 1987-11-18 | 1989-06-26 | Intersil Inc | Cmos integrated circuit and its manufacture |
JPH03116820A (en) * | 1989-09-29 | 1991-05-17 | Shin Etsu Handotai Co Ltd | Misfit transposition control method |
EP0798765A2 (en) * | 1996-03-28 | 1997-10-01 | Shin-Etsu Handotai Company Limited | Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface |
-
1979
- 1979-11-16 JP JP14870479A patent/JPS5671928A/en active Pending
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS586140A (en) * | 1981-07-03 | 1983-01-13 | Nec Corp | Manufacture of silicon wafer |
JPS5892212A (en) * | 1981-11-27 | 1983-06-01 | Fujitsu Ltd | Semiconductor device and manufacture therefor |
JPS58134430A (en) * | 1982-02-04 | 1983-08-10 | Nippon Denso Co Ltd | Manufacture of semiconductor device |
JPH0345535B2 (en) * | 1982-02-04 | 1991-07-11 | Nippon Denso Co | |
JPS58207641A (en) * | 1982-05-28 | 1983-12-03 | Nec Corp | Substrate for semiconductor device |
JPS59115519A (en) * | 1982-12-23 | 1984-07-04 | ニチコン株式会社 | Electrolytic condenser |
JPH01161756A (en) * | 1987-11-18 | 1989-06-26 | Intersil Inc | Cmos integrated circuit and its manufacture |
JPH03116820A (en) * | 1989-09-29 | 1991-05-17 | Shin Etsu Handotai Co Ltd | Misfit transposition control method |
EP0798765A2 (en) * | 1996-03-28 | 1997-10-01 | Shin-Etsu Handotai Company Limited | Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface |
EP0798765A3 (en) * | 1996-03-28 | 1998-08-05 | Shin-Etsu Handotai Company Limited | Method of manufacturing a semiconductor wafer comprising a dopant evaporation preventive film on one main surface and an epitaxial layer on the other main surface |
US5834363A (en) * | 1996-03-28 | 1998-11-10 | Shin-Etsu Handotai Co., Ltd. | Method of manufacturing semiconductor wafer, semiconductor wafer manufactured by the same, semiconductor epitaxial wafer, and method of manufacturing the semiconductor epitaxial wafer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4203799A (en) | Method for monitoring thickness of epitaxial growth layer on substrate | |
Meyerson | High-speed silicon-germanium electronics | |
JPS56142630A (en) | Manufacture of semiconductor device | |
JPS5671928A (en) | Treatment for silicon substrate | |
JPS54155770A (en) | Manufacture of semiconductor device | |
JPS5671929A (en) | Treatment for silicon substrate | |
JPS5659694A (en) | Manufacture of thin film | |
JPS5717125A (en) | Manufacture of semiconductor device | |
JPS5795625A (en) | Manufacture of semiconductor device | |
JPS571226A (en) | Manufacture of semiconductor substrate with buried diffusion layer | |
JPS577923A (en) | Manufacture of receiving table for processing single silicon crystal wafer | |
JPS56167335A (en) | Manufacture of semiconductor device | |
JPS5656648A (en) | Manufacture of semiconductor device | |
JPS5633840A (en) | Manufacture of semiconductor device | |
JPS6411316A (en) | Formation of soi structure | |
JPS5656647A (en) | Manufacture of semiconductor device | |
JPS57199227A (en) | Manufacture of semiconductor device | |
JPS6012775B2 (en) | Method for forming a single crystal semiconductor layer on a foreign substrate | |
JPS5667922A (en) | Preparation method of semiconductor system | |
JPS5730364A (en) | Manufacture of semiconductor device | |
JPS5643719A (en) | Vapor-phase epitaxial growth | |
JPS57153438A (en) | Manufacture of semiconductor substrate | |
JPH01181436A (en) | Temperature measurement of semiconductor manufacturing device | |
JPS5646538A (en) | Manufacture of compound semiconductor device | |
JPS5587446A (en) | Manufacture of semiconductor device |