JPS5685838A - Substrate for semiconductor device and manufacture of the same - Google Patents

Substrate for semiconductor device and manufacture of the same

Info

Publication number
JPS5685838A
JPS5685838A JP16324379A JP16324379A JPS5685838A JP S5685838 A JPS5685838 A JP S5685838A JP 16324379 A JP16324379 A JP 16324379A JP 16324379 A JP16324379 A JP 16324379A JP S5685838 A JPS5685838 A JP S5685838A
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
semiconductor
back surface
sapphire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16324379A
Other languages
Japanese (ja)
Inventor
Minoru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16324379A priority Critical patent/JPS5685838A/en
Publication of JPS5685838A publication Critical patent/JPS5685838A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To obtain a semiconductor layer of high quality by covering the back surface of a monocrystalline insulating plate with an insulating layer or a semiconductor layer, polishing the surface thereof, and covering the semiconductor layer therewith. CONSTITUTION:An Si epitaxial layer having a thickness of approx. 1-10mum is grown on the back surface of a sapphire thin plate, the front surface thereof is sufficiently polished to a mirror surface, subsequently an Si epitaxial layer having a thickness of 0.1-1mum is grown thereon, and a semiconductor element is thus formed. Since aluminum is diffused from the sapphire substrate even if it is treated at high temperature in any gas atmosphere during a manufacturing step because the back surface of the sapphire plate is covered with the Si opitaxial layer in this configuration, the semiconductor device cannot be contaminated. In addition, a bent or a crack can be prevented in the device, and a semiconductor device having high performance and reliability can be obtained.
JP16324379A 1979-12-15 1979-12-15 Substrate for semiconductor device and manufacture of the same Pending JPS5685838A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16324379A JPS5685838A (en) 1979-12-15 1979-12-15 Substrate for semiconductor device and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16324379A JPS5685838A (en) 1979-12-15 1979-12-15 Substrate for semiconductor device and manufacture of the same

Publications (1)

Publication Number Publication Date
JPS5685838A true JPS5685838A (en) 1981-07-13

Family

ID=15770064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16324379A Pending JPS5685838A (en) 1979-12-15 1979-12-15 Substrate for semiconductor device and manufacture of the same

Country Status (1)

Country Link
JP (1) JPS5685838A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208212A (en) * 1985-03-12 1986-09-16 Nec Corp Manufacture of semiconductor substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057381A (en) * 1973-09-19 1975-05-19
JPS5199972A (en) * 1975-02-28 1976-09-03 Nippon Electric Co HANDOTA ISOCHI

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5057381A (en) * 1973-09-19 1975-05-19
JPS5199972A (en) * 1975-02-28 1976-09-03 Nippon Electric Co HANDOTA ISOCHI

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208212A (en) * 1985-03-12 1986-09-16 Nec Corp Manufacture of semiconductor substrate

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