JPS57204115A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57204115A
JPS57204115A JP8824781A JP8824781A JPS57204115A JP S57204115 A JPS57204115 A JP S57204115A JP 8824781 A JP8824781 A JP 8824781A JP 8824781 A JP8824781 A JP 8824781A JP S57204115 A JPS57204115 A JP S57204115A
Authority
JP
Japan
Prior art keywords
light transmitting
transmitting property
substrate
polycrystal
fringe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8824781A
Other languages
Japanese (ja)
Inventor
Minoru Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8824781A priority Critical patent/JPS57204115A/en
Publication of JPS57204115A publication Critical patent/JPS57204115A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To improve efficiency on production by selectively mounting a material having low light transmitting property to a section in the vicinity of the fringe of a semiconductor layer, which is set up onto a light transmitting substrate and the surface thereof is coated with an insulating layer, and conducting succeeding processes. CONSTITUTION:A P type Si film 2 is formed onto the light transmitting substrate 1 of sapphire, etc., the surface is coated with the insulating layer 3 such as a thermal oxide film, the material 4 having low light transmitting property such as polycrystal Si is shaped to the surface, the polycrystal Si 4 is left only in the section in the vicinity of the fringe through selective etching, and succeeding processes are conducted under this condition. Accordingly, the presence of a wafer can accurately be detected sufficiently by means of a photosensor even in the substrate having excellent light transmitting property such as SOS, and efficiency on production is improved.
JP8824781A 1981-06-10 1981-06-10 Manufacture of semiconductor device Pending JPS57204115A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8824781A JPS57204115A (en) 1981-06-10 1981-06-10 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8824781A JPS57204115A (en) 1981-06-10 1981-06-10 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57204115A true JPS57204115A (en) 1982-12-14

Family

ID=13937518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8824781A Pending JPS57204115A (en) 1981-06-10 1981-06-10 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57204115A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58225646A (en) * 1982-06-23 1983-12-27 Fujitsu Ltd Preparation of semiconductor device
JPS6076606A (en) * 1983-10-03 1985-05-01 Nippon Kogaku Kk <Nikon> Defect checking method of mask
JP2006147788A (en) * 2004-11-18 2006-06-08 Oki Electric Ind Co Ltd Structure of semiconductor device and its manufacturing method
WO2010067814A1 (en) * 2008-12-11 2010-06-17 住友電気工業株式会社 Substrate and method for manufacturing substrate
JP2015185791A (en) * 2014-03-26 2015-10-22 セイコーエプソン株式会社 Substrate for sensor detection and manufacturing method of the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58225646A (en) * 1982-06-23 1983-12-27 Fujitsu Ltd Preparation of semiconductor device
JPS6076606A (en) * 1983-10-03 1985-05-01 Nippon Kogaku Kk <Nikon> Defect checking method of mask
JP2006147788A (en) * 2004-11-18 2006-06-08 Oki Electric Ind Co Ltd Structure of semiconductor device and its manufacturing method
WO2010067814A1 (en) * 2008-12-11 2010-06-17 住友電気工業株式会社 Substrate and method for manufacturing substrate
JP2010141124A (en) * 2008-12-11 2010-06-24 Sumitomo Electric Ind Ltd Substrate and method for manufacturing substrate
CN102246265A (en) * 2008-12-11 2011-11-16 住友电气工业株式会社 Substrate and method for manufacturing substrate
JP2015185791A (en) * 2014-03-26 2015-10-22 セイコーエプソン株式会社 Substrate for sensor detection and manufacturing method of the same

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