JPS57211734A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57211734A
JPS57211734A JP56097699A JP9769981A JPS57211734A JP S57211734 A JPS57211734 A JP S57211734A JP 56097699 A JP56097699 A JP 56097699A JP 9769981 A JP9769981 A JP 9769981A JP S57211734 A JPS57211734 A JP S57211734A
Authority
JP
Japan
Prior art keywords
etching
insulating film
approx
wiring
growing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56097699A
Other languages
Japanese (ja)
Inventor
Riyouichi Hazuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56097699A priority Critical patent/JPS57211734A/en
Publication of JPS57211734A publication Critical patent/JPS57211734A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain an insulating film with an approximately flat surface with less influence by unevenness, by simultaneously performing anisotropic dry- etching, when vapor-growing an insulating film on the uneven surface. CONSTITUTION:An SiO2 layer 2 and Al wiring 3 are formed on the substrate 1 and, when vapor-growing Si3N4 4 thereon, SiH4, and NH3 as generation gases simultaneously with CF4 as etching gas are added. In case of etching the insulating film by anisotropic etching, the etching speed for a convex region becomes higher than that for a concave region of the insulating film for rapid growth for the insulating layer of the concave region, finally obtaining an insulating layer with a smooth surface. The drawing represents the embodiment with the Al film thickness of approx. 1mum, wiring width of approx. 2mum and interval of an adjacent wiring of approx. 3mum.
JP56097699A 1981-06-24 1981-06-24 Manufacture of semiconductor device Pending JPS57211734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56097699A JPS57211734A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56097699A JPS57211734A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57211734A true JPS57211734A (en) 1982-12-25

Family

ID=14199172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56097699A Pending JPS57211734A (en) 1981-06-24 1981-06-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57211734A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191432A (en) * 1982-05-06 1983-11-08 Fujitsu Ltd Forming method for thin-film
JPS6139525A (en) * 1984-06-01 1986-02-25 テキサス　インスツルメンツ　インコ−ポレイテツド Method of depositing slooth ground shape and plasma depositing chamber for same method
JPS61182219A (en) * 1985-02-08 1986-08-14 Nippon Telegr & Teleph Corp <Ntt> Thin film growing method
EP0277766A2 (en) * 1987-02-02 1988-08-10 AT&T Corp. Process for producing devices containing silicon nitride films
JPH0376224A (en) * 1989-07-31 1991-04-02 American Teleph & Telegr Co <Att> Manufacture of integrated circuit element
EP0441653A2 (en) * 1990-02-09 1991-08-14 Applied Materials, Inc. Improvements in process for planarizing an integrated circuit structure using low melting inorganic material

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191432A (en) * 1982-05-06 1983-11-08 Fujitsu Ltd Forming method for thin-film
JPS6139525A (en) * 1984-06-01 1986-02-25 テキサス　インスツルメンツ　インコ−ポレイテツド Method of depositing slooth ground shape and plasma depositing chamber for same method
JPS61182219A (en) * 1985-02-08 1986-08-14 Nippon Telegr & Teleph Corp <Ntt> Thin film growing method
EP0277766A2 (en) * 1987-02-02 1988-08-10 AT&T Corp. Process for producing devices containing silicon nitride films
JPH0376224A (en) * 1989-07-31 1991-04-02 American Teleph & Telegr Co <Att> Manufacture of integrated circuit element
EP0441653A2 (en) * 1990-02-09 1991-08-14 Applied Materials, Inc. Improvements in process for planarizing an integrated circuit structure using low melting inorganic material

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