JPS56130942A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56130942A JPS56130942A JP3381780A JP3381780A JPS56130942A JP S56130942 A JPS56130942 A JP S56130942A JP 3381780 A JP3381780 A JP 3381780A JP 3381780 A JP3381780 A JP 3381780A JP S56130942 A JPS56130942 A JP S56130942A
- Authority
- JP
- Japan
- Prior art keywords
- silicon dioxide
- dioxide film
- conductivity type
- film
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To enhance the density of elements and the acceleration of manufacturing a semiconductor device by growing silicon dioxide film mainly from a side wall when forming a dielectric isolating region. CONSTITUTION:After a reverse conductivity type impurity layer 12 is formed on one conductivity type Si semiconductor substrate 11, a reverse conductivity type Si semiconductor layer 13 is epitaxially grown on the entire surface. After a photosensitive resin film pattern 14 is then formed thereon, the epitaxial layer 13 is etched by a spatter etching process in CF4 gas atmsphere to form a hole 15 thereat. Then, the film 14 is removed, and a silicon dioxide film 16 is formed thereon in high temperature oxygen atmosphere. It is noted that the width of the hole 15 is less than 90% of the thickness of the silicon dioxide film formed on the surface of the semiconductor substrate. Thereafter, the silicon dioxide film on the surface is etched to expose the substrate, a base 17, an emitter layer 18 and a contact 19 are formed to form a bipolar element. According to this process, the hole can be buried by forming a thin oxide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3381780A JPS56130942A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3381780A JPS56130942A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56130942A true JPS56130942A (en) | 1981-10-14 |
Family
ID=12397024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3381780A Pending JPS56130942A (en) | 1980-03-17 | 1980-03-17 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56130942A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007516617A (en) * | 2003-12-19 | 2007-06-21 | サード ディメンジョン （スリーディ） セミコンダクタ インコーポレイテッド | Method for forming a thick dielectric region using a trench formed by etching |
-
1980
- 1980-03-17 JP JP3381780A patent/JPS56130942A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007516617A (en) * | 2003-12-19 | 2007-06-21 | サード ディメンジョン （スリーディ） セミコンダクタ インコーポレイテッド | Method for forming a thick dielectric region using a trench formed by etching |
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