JPS5671982A - Junction type field effect transistor - Google Patents

Junction type field effect transistor

Info

Publication number
JPS5671982A
JPS5671982A JP14982079A JP14982079A JPS5671982A JP S5671982 A JPS5671982 A JP S5671982A JP 14982079 A JP14982079 A JP 14982079A JP 14982079 A JP14982079 A JP 14982079A JP S5671982 A JPS5671982 A JP S5671982A
Authority
JP
Japan
Prior art keywords
layer
layers
gate
insulating substrate
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14982079A
Other languages
Japanese (ja)
Inventor
Kiyoshi Ariyoshi
Masahiro Akitani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP14982079A priority Critical patent/JPS5671982A/en
Publication of JPS5671982A publication Critical patent/JPS5671982A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain a high pressure tight JFET by a method wherein a P type gate is installed in an N type Si layer on an insulating substrate with a given interval and a N<+> layer is arranged at the both sides holding a gate layer and a channel between them, and further, coating with a gate insulating film, each electrode is installed. CONSTITUTION:Ion is applied into an N type Si layer 4 on an insulating substrate 3, and P layers 5, 6 are formed so as to face each other having a given interval and to be extending between the mutually facing surface 7 and 8 of the N layer 4. And further, N<+> layers 9, 10 are formed so as to face toward each other holding a channel part between the P layers 5 and 6 between them and to be extending between the surfaces 7 and 8. A gate electrode 15 is installed on the face 7 of the layer 4 by means of an SiO2 film 14 and it is coupled 16, 17 ohmic-ly with the layer 5, 6 and further, source, drain electrodes 18, 19 are formed on N<+> layers 9, 10. When a space between the N layer 9, 10 is properly selected considering the concentration of the layer 4, then, the pressure tightness between the source and the drain becomes sufficiently high, and when layers 4, 5, 6, 9, 10 are formed thinly, then, the short channel effect is reduced. Since no suspending capacity exists to and from the insulating substrate 3, a system of high speed response is obtained.
JP14982079A 1979-11-19 1979-11-19 Junction type field effect transistor Pending JPS5671982A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14982079A JPS5671982A (en) 1979-11-19 1979-11-19 Junction type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14982079A JPS5671982A (en) 1979-11-19 1979-11-19 Junction type field effect transistor

Publications (1)

Publication Number Publication Date
JPS5671982A true JPS5671982A (en) 1981-06-15

Family

ID=15483408

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14982079A Pending JPS5671982A (en) 1979-11-19 1979-11-19 Junction type field effect transistor

Country Status (1)

Country Link
JP (1) JPS5671982A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4914491A (en) * 1987-11-13 1990-04-03 Kopin Corporation Junction field-effect transistors formed on insulator substrates

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110281A (en) * 1975-03-24 1976-09-29 Mitsubishi Electric Corp DENKAI KOKATORAN JISUTA

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110281A (en) * 1975-03-24 1976-09-29 Mitsubishi Electric Corp DENKAI KOKATORAN JISUTA

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4914491A (en) * 1987-11-13 1990-04-03 Kopin Corporation Junction field-effect transistors formed on insulator substrates

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