JPS5619669A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS5619669A JPS5619669A JP9461079A JP9461079A JPS5619669A JP S5619669 A JPS5619669 A JP S5619669A JP 9461079 A JP9461079 A JP 9461079A JP 9461079 A JP9461079 A JP 9461079A JP S5619669 A JPS5619669 A JP S5619669A
- Authority
- JP
- Japan
- Prior art keywords
- film
- deposited
- polycrystalline
- oxidation
- films
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000005530 etching Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 230000003647 oxidation Effects 0.000 abstract 2
- 238000007254 oxidation reaction Methods 0.000 abstract 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 238000004904 shortening Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Abstract
PURPOSE:To avoid the decrease in the yield rate caused by pinholes in a photoresist by employing polycrystalline Si as a mask for introducing impurities, in the case an MOS-type semiconductor device is manufactured, and by shortening the etching time. CONSTITUTION:A thick field oxide film 4 is formed on a specified region of the surface of a substrate-electrode take-out region 10 of a semiconductor substrate 1, with an oxidation-resistant film being covered. Then, said oxidation-resistant film is removed, and a thin oxidized film 5' is deposited on the portion where it is removed. A thin gate oxidized film 5 is also deposited on the portion between the neighbouring films 4. Then, a polycrystalline Si layer is grown on all the surface, and the polycrystalline films 6 and 6' are remained on the center portion of the film 5 and on all the film 5' by short-time etching. Then, all the surface is convered by an SiO2 film. Thereafter, contact holes 8 and 8' are provided by a photoresist process, the film 7 is selectively etched and removed, and Al 11 for wiring is deposited on the surface of exposed regions 2, 3, and 10, respectively. In this method, wirings are not shorted even though the pinholes exist in the resist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9461079A JPS5619669A (en) | 1979-07-25 | 1979-07-25 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9461079A JPS5619669A (en) | 1979-07-25 | 1979-07-25 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5619669A true JPS5619669A (en) | 1981-02-24 |
Family
ID=14115007
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9461079A Pending JPS5619669A (en) | 1979-07-25 | 1979-07-25 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5619669A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5021353A (en) * | 1990-02-26 | 1991-06-04 | Micron Technology, Inc. | Split-polysilicon CMOS process incorporating self-aligned silicidation of conductive regions |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5326585A (en) * | 1976-08-25 | 1978-03-11 | Hitachi Ltd | Production of mis semiconductor device |
-
1979
- 1979-07-25 JP JP9461079A patent/JPS5619669A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5326585A (en) * | 1976-08-25 | 1978-03-11 | Hitachi Ltd | Production of mis semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5021353A (en) * | 1990-02-26 | 1991-06-04 | Micron Technology, Inc. | Split-polysilicon CMOS process incorporating self-aligned silicidation of conductive regions |
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