JPS6467910A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6467910A
JPS6467910A JP22504887A JP22504887A JPS6467910A JP S6467910 A JPS6467910 A JP S6467910A JP 22504887 A JP22504887 A JP 22504887A JP 22504887 A JP22504887 A JP 22504887A JP S6467910 A JPS6467910 A JP S6467910A
Authority
JP
Japan
Prior art keywords
substrate
oxide film
diffusion
polysilicon
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22504887A
Other languages
Japanese (ja)
Inventor
Tetsuo Higuchi
Satoru Kamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP22504887A priority Critical patent/JPS6467910A/en
Publication of JPS6467910A publication Critical patent/JPS6467910A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To suppress diffusion of impurities completely at the rear and the side of a substrate and obtain a semiconductor device having a high productivity as well, by depositing polysilicon at a part other than the main surface of the substrate after forming an oxide film for diffusion mask on a semiconductor substrate. CONSTITUTION:A silicon oxide film 2 which forms a mask in the case of diffusion of impurites grows on a silicon substrate 1. Then polysilicon is deposited. And then only a polysilicon film 3 formed on the surface of the silicon substrate 1 is removed by anisotropic etching. Further, impurity diffusion windows 4 are formed by wet etching through photolithography. As oxide films at the rear and the side of a wafer are protected by the polysilicon film 3, they are left without being etched. Then, after removing a resist, impurity diffusion regions 5 where no deposition of the impurities and drive are performed are formed. Since its drive is performed at an oxidizing atmosphere in such a case, the silicon film 3 becomes the oxide film on the whole. Then, even though the oxide film is removed wholly so as to treat the next process, regions where impurities are diffused are merely original diffused regions and no autodoping takes place even in the heat-treatment of next process.
JP22504887A 1987-09-08 1987-09-08 Manufacture of semiconductor device Pending JPS6467910A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22504887A JPS6467910A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22504887A JPS6467910A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6467910A true JPS6467910A (en) 1989-03-14

Family

ID=16823222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22504887A Pending JPS6467910A (en) 1987-09-08 1987-09-08 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6467910A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357059A (en) * 1989-06-29 1994-10-18 Sumitomo Electric Industries, Ltd. Construction of electrical connection to oxide superconductor
US5837378A (en) * 1995-09-12 1998-11-17 Micron Technology, Inc. Method of reducing stress-induced defects in silicon
JP2008103562A (en) * 2006-10-19 2008-05-01 Fuji Electric Device Technology Co Ltd Manufacturing method of semiconductor device
JP2013077833A (en) * 2012-12-18 2013-04-25 Fuji Electric Co Ltd Semiconductor device manufacturing method
GB2561890A (en) * 2017-04-27 2018-10-31 Flihi Tech Co Ltd Bento box structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244165A (en) * 1975-10-06 1977-04-06 Hitachi Ltd Process for production of semiconductor device
JPS57211727A (en) * 1981-06-24 1982-12-25 Toshiba Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5244165A (en) * 1975-10-06 1977-04-06 Hitachi Ltd Process for production of semiconductor device
JPS57211727A (en) * 1981-06-24 1982-12-25 Toshiba Corp Manufacture of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357059A (en) * 1989-06-29 1994-10-18 Sumitomo Electric Industries, Ltd. Construction of electrical connection to oxide superconductor
US5837378A (en) * 1995-09-12 1998-11-17 Micron Technology, Inc. Method of reducing stress-induced defects in silicon
JP2008103562A (en) * 2006-10-19 2008-05-01 Fuji Electric Device Technology Co Ltd Manufacturing method of semiconductor device
JP2013077833A (en) * 2012-12-18 2013-04-25 Fuji Electric Co Ltd Semiconductor device manufacturing method
GB2561890A (en) * 2017-04-27 2018-10-31 Flihi Tech Co Ltd Bento box structure

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