JPS5750469A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS5750469A JPS5750469A JP12577280A JP12577280A JPS5750469A JP S5750469 A JPS5750469 A JP S5750469A JP 12577280 A JP12577280 A JP 12577280A JP 12577280 A JP12577280 A JP 12577280A JP S5750469 A JPS5750469 A JP S5750469A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- oxide film
- film
- wiring layer
- field oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 3
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910020968 MoSi2 Inorganic materials 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
- 238000002844 melting Methods 0.000 abstract 1
- 230000008018 melting Effects 0.000 abstract 1
- 239000007769 metal material Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 238000001259 photo etching Methods 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
PURPOSE:To obtain easily a multilayer wiring, by epitaxially growing a semiconductor layer on an insulator substrate provided with the first wiring layer made of high- melting point metal material, forming a field oxide film and forming the second wiring layer thereon. CONSTITUTION:An MoSi2 film is deposited on a sapphier substrate 21 and photoetched to form a first wiring layer 22. A silicon epitaxial layer is formed over the whole surface of the sapphier substrate 21, and with an Si3N4 film as a mask, a selective oxidation is performed to form a monocrystalline island region and a field oxide film 26. Next, the Si3N4 film is removed, and a thin oxide film is formed. Then, a polycrystalline silicon layer is formed, and a gate electrode 29 and a second wiring layer 30 are formed on the field oxide film 26 by photoetching process. Then, N<+> type source and drain regions 32, 33 are formed, an SiO2 layer 34 is deposited and Al wirings 35, 36 are formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12577280A JPS5750469A (en) | 1980-09-10 | 1980-09-10 | Manufacture of semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12577280A JPS5750469A (en) | 1980-09-10 | 1980-09-10 | Manufacture of semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5750469A true JPS5750469A (en) | 1982-03-24 |
Family
ID=14918444
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12577280A Pending JPS5750469A (en) | 1980-09-10 | 1980-09-10 | Manufacture of semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5750469A (en) |
-
1980
- 1980-09-10 JP JP12577280A patent/JPS5750469A/en active Pending
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