JPS56137655A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS56137655A JPS56137655A JP4067980A JP4067980A JPS56137655A JP S56137655 A JPS56137655 A JP S56137655A JP 4067980 A JP4067980 A JP 4067980A JP 4067980 A JP4067980 A JP 4067980A JP S56137655 A JPS56137655 A JP S56137655A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- layer
- wiring
- psg113
- eaves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
Abstract
PURPOSE:To lay fine wiring without any adverse effect on the properties of an element by using impurity-added glass as spacer, providing an eaves of resist through the application of a resist mask and subsequent glass etching, and then removing the resist with the building up of a metal. CONSTITUTION:An opening 111 is provided in a silicon dioxide 110 on a silicon substrate where a diffusion layer is formed as prearranged and a silicon dioxide layer 112 and PSG113 with no impurities added are overlapped. Following this procedure, a resist mask 14 is applied and a window is opened in the PSG113 by combined means of aerotropic and isotropic etchings to create an eaves. Next, if an aluminum and silicon alloy 116 is built up, a stepped cut is assured. With the resist removed, fine wirings 117-119 are obtained. The second layer of aluminum wiring 121 is created through an interlayer insulation film 120. Under this constitution, there is no stepped out because of the formation of the second layer of wiring on a flat surface. Besides, the stepped cut of the alloy 116 is assured thus enabling the formation of fine wiring to be realized and a device of high reliability to be available.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4067980A JPS56137655A (en) | 1980-03-29 | 1980-03-29 | Manufacture of semiconductor device |
EP19810102119 EP0037040B1 (en) | 1980-03-29 | 1981-03-20 | Method of manufacturing a semiconductor device |
DE8181102119T DE3173484D1 (en) | 1980-03-29 | 1981-03-20 | Method of manufacturing a semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4067980A JPS56137655A (en) | 1980-03-29 | 1980-03-29 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56137655A true JPS56137655A (en) | 1981-10-27 |
Family
ID=12587212
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4067980A Pending JPS56137655A (en) | 1980-03-29 | 1980-03-29 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56137655A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5948958A (en) * | 1982-08-12 | 1984-03-21 | シ−メンス・アクチエンゲゼルシヤフト | Semiconductor integrated circuit |
US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
-
1980
- 1980-03-29 JP JP4067980A patent/JPS56137655A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5948958A (en) * | 1982-08-12 | 1984-03-21 | シ−メンス・アクチエンゲゼルシヤフト | Semiconductor integrated circuit |
JPH0241902B2 (en) * | 1982-08-12 | 1990-09-19 | ||
US7112468B2 (en) | 1998-09-25 | 2006-09-26 | Stmicroelectronics, Inc. | Stacked multi-component integrated circuit microprocessor |
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