JPS56134745A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS56134745A
JPS56134745A JP3837180A JP3837180A JPS56134745A JP S56134745 A JPS56134745 A JP S56134745A JP 3837180 A JP3837180 A JP 3837180A JP 3837180 A JP3837180 A JP 3837180A JP S56134745 A JPS56134745 A JP S56134745A
Authority
JP
Japan
Prior art keywords
circuits
bus line
increased
timing signals
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3837180A
Other languages
Japanese (ja)
Other versions
JPS6366059B2 (en
Inventor
Koji Eguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3837180A priority Critical patent/JPS56134745A/en
Publication of JPS56134745A publication Critical patent/JPS56134745A/en
Publication of JPS6366059B2 publication Critical patent/JPS6366059B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To reduce an occupied area of a bus line wiring by a method wherein a plurality of the circuits generating timing signals are divided and arranged near specific peripheral circuits in which the outputs thereof are used as the inputs. CONSTITUTION:The timing signals generating circuits 1b operate the divided timing signals generating circuits 2b and 2c which have five output signal lines. Since the load capacity Cb is increased by a wiring extension, a driving capability of the circuit 1b is required to be increased. However, the increase of a pattern area has not influence on a chip size very quite. The driving capacities of the circuits 2b, 2c become advantageous as much as the length of the bus line shortened. The increased part of the pattern area due to the division by two can be ignored as compared with the reduced part of the bus line area.
JP3837180A 1980-03-26 1980-03-26 Integrated circuit device Granted JPS56134745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3837180A JPS56134745A (en) 1980-03-26 1980-03-26 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3837180A JPS56134745A (en) 1980-03-26 1980-03-26 Integrated circuit device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP1305184A Division JPH02186668A (en) 1989-11-24 1989-11-24 Integrated circuit device

Publications (2)

Publication Number Publication Date
JPS56134745A true JPS56134745A (en) 1981-10-21
JPS6366059B2 JPS6366059B2 (en) 1988-12-19

Family

ID=12523416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3837180A Granted JPS56134745A (en) 1980-03-26 1980-03-26 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS56134745A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850698A (en) * 1981-09-21 1983-03-25 Toshiba Corp Semiconductor memory
JPH0250459A (en) * 1988-08-12 1990-02-20 Toshiba Corp Disposing structure for integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3906463A (en) * 1974-06-03 1975-09-16 Motorola Inc MOS memory system
JPS5325324A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Address selection system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3906463A (en) * 1974-06-03 1975-09-16 Motorola Inc MOS memory system
JPS5325324A (en) * 1976-08-23 1978-03-09 Hitachi Ltd Address selection system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850698A (en) * 1981-09-21 1983-03-25 Toshiba Corp Semiconductor memory
JPH0217878B2 (en) * 1981-09-21 1990-04-23 Tokyo Shibaura Electric Co
JPH0250459A (en) * 1988-08-12 1990-02-20 Toshiba Corp Disposing structure for integrated circuit

Also Published As

Publication number Publication date
JPS6366059B2 (en) 1988-12-19

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